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f53fa2a0cb
This patch converts MT761{0,2,3} PCIe WiFi calibration data to NVMEM
format for legacy Ralink SoCs (MT7620 and Mt7628). The EEPROM size of
the MT7610 and MT7612 is 0x200. there are only three devices uses
MT7613 NIC, ASUS RT-AC1200 V2, COMFAST CF-WR758AC V2 and Keenetic
KN-1613. The EEPROM size of them is 0x4da8.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
123 lines
2.0 KiB
Plaintext
123 lines
2.0 KiB
Plaintext
#include "mt7628an.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "mercury,mac1200r-v2", "mediatek,mt7628an-soc";
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model = "Mercury MAC1200R v2";
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aliases {
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led-boot = &led_status;
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led-failsafe = &led_status;
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led-running = &led_status;
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led-upgrade = &led_status;
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};
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leds {
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compatible = "gpio-leds";
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led_status: status {
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label = "green:status";
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x1d800>;
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};
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factory: partition@1d800 {
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compatible = "nvmem-cells";
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label = "factory_info";
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reg = <0x1d800 0x800>;
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#address-cells = <1>;
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#size-cells = <1>;
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read-only;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x400>;
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};
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macaddr_factory_d: macaddr@d {
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reg = <0xd 0x6>;
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};
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};
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art: partition@1e000 {
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compatible = "nvmem-cells";
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label = "art";
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reg = <0x1e000 0x2000>;
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#address-cells = <1>;
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#size-cells = <1>;
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read-only;
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eeprom_art_1000: eeprom@1000 {
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reg = <0x1000 0x200>;
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};
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};
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partition@20000 {
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label = "config";
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reg = <0x20000 0x10000>;
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};
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partition@30000 {
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label = "u-boot2";
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reg = <0x30000 0x10000>;
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};
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partition@40000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x40000 0x7c0000>;
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};
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};
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};
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};
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ðernet {
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pinctrl-names = "default";
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nvmem-cells = <&macaddr_factory_d>;
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nvmem-cell-names = "mac-address";
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};
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&esw {
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mediatek,portmap = <0x2f>;
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};
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&wmac {
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status = "okay";
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_art_1000>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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