mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 23:42:43 +00:00
7774b86019
Add the missing pinctrl properties on the ethernet node. GMAC1 will start working with this change. Link: https://lore.kernel.org/netdev/83a35aa3-6cb8-2bc4-2ff4-64278bbcd8c8@arinc9.com/ Overwrite pinctrl-0 property without rgmii2_pins on devicetrees which use the rgmii2 pins as GPIO (22 - 33). Give gpio function to rgmii2 pin group on mt7621_tplink_archer-x6-v3.dtsi which uses GPIO 28. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
180 lines
2.7 KiB
Plaintext
180 lines
2.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
#include "mt7621.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "zyxel,nr7101", "mediatek,mt7621-soc";
|
|
model = "ZyXEL NR7101";
|
|
|
|
aliases {
|
|
led-boot = &led_system_green;
|
|
led-failsafe = &led_system_green;
|
|
led-running = &led_system_green;
|
|
led-upgrade = &led_system_green;
|
|
label-mac-device = &gmac0;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
system_yellow {
|
|
label = "yellow:system";
|
|
gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
led_system_green: system_green {
|
|
label = "green:system";
|
|
gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
system_red {
|
|
label = "red:system";
|
|
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
wps {
|
|
label = "wlan";
|
|
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WLAN>;
|
|
};
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gpio {
|
|
lte_pwrkey {
|
|
gpio-hog;
|
|
gpios = <4 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "lte-pwrkey";
|
|
};
|
|
|
|
lte_power {
|
|
gpio-hog;
|
|
gpios = <18 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "lte-power";
|
|
};
|
|
};
|
|
|
|
&nand {
|
|
status = "okay";
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "Bootloader";
|
|
reg = <0x0 0x80000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@80000 {
|
|
label = "Config";
|
|
reg = <0x80000 0x80000>;
|
|
};
|
|
|
|
factory: partition@100000 {
|
|
label = "Factory";
|
|
reg = <0x100000 0x40000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@140000 {
|
|
label = "Kernel";
|
|
reg = <0x140000 0x1ec0000>;
|
|
};
|
|
|
|
partition@540000 {
|
|
label = "ubi";
|
|
reg = <0x540000 0x1ac0000>;
|
|
};
|
|
|
|
partition@2140000 {
|
|
label = "Kernel2";
|
|
reg = <0x2140000 0x1ec0000>;
|
|
};
|
|
|
|
partition@4000000 {
|
|
label = "wwan";
|
|
reg = <0x4000000 0x100000>;
|
|
};
|
|
|
|
partition@4100000 {
|
|
label = "data";
|
|
reg = <0x4100000 0x1000000>;
|
|
};
|
|
|
|
partition@5100000 {
|
|
label = "rom-d";
|
|
reg = <0x5100000 0x100000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@5200000 {
|
|
label = "reserve";
|
|
reg = <0x5200000 0x80000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
mt76@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x0>;
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
|
|
};
|
|
|
|
&gmac0 {
|
|
nvmem-cells = <&macaddr_factory_e000>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&switch0 {
|
|
ports {
|
|
port@2 {
|
|
status = "okay";
|
|
label = "lan";
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "i2c", "rgmii2", "uart3", "jtag", "wdt";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
&factory {
|
|
compatible = "nvmem-cells";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_factory_e000: macaddr@e000 {
|
|
reg = <0xe000 0x6>;
|
|
};
|
|
};
|