openwrt/target/linux/ath79/dts/qca9558_tl-archer-c7.dtsi
Chuanhong Guo c463320812 ath79: Remove all memory nodes defined in dts
This target can automatically detect the correct memory size and we've
been using it for long in ar71xx.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-06-28 18:39:57 +02:00

228 lines
3.6 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9557.dtsi"
/ {
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-status = &system;
};
leds {
compatible = "gpio-leds";
system: system {
label = "tp-link:green:system";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
default-state = "on";
};
usb1 {
label = "tp-link:green:usb1";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
default-state = "off";
trigger-sources = <&hub_port0>;
linux,default-trigger = "usbport";
};
usb2 {
label = "tp-link:green:usb2";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
default-state = "off";
trigger-sources = <&hub_port1>;
linux,default-trigger = "usbport";
};
wlan2g {
label = "tp-link:green:wlan2g";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "phy1tpt";
};
qss {
label = "tp-link:green:qss";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
default-state = "off";
};
wlan5g {
label = "tp-link:green:wlan5g";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "phy0tpt";
};
};
keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
rfkill: wifi {
linux,code = <KEY_RFKILL>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
};
};
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_usb1_power {
gpio-export,name = "tp-link:power:usb1";
gpio-export,output = <1>;
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
};
gpio_usb2_power {
gpio-export,name = "tp-link:power:usb2";
gpio-export,output = <1>;
gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
};
};
};
&pcie1 {
status = "okay";
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&usb_phy0 {
status = "okay";
};
&usb0 {
status = "okay";
hub_port0: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb_phy1 {
status = "okay";
};
&usb1 {
status = "okay";
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
label = "firmware";
reg = <0x020000 0xfd0000>;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */
0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
0x50 0xc737c737 /* LED_CTRL0 */
0x54 0x00000000 /* LED_CTRL1 */
0x58 0x00000000 /* LED_CTRL2 */
0x5c 0x0030c300 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
0x94 0x0000007e /* PORT6 STATUS */
>;
};
};
&mdio1 {
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <1>;
phy-handle = <&phy0>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&uboot 0x1fc00>;
phy-handle = <&phy1>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&uboot 0x1fc00>;
};