mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 17:18:59 +00:00
87c0c2d81d
Run tested on a NSLU2. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 37124
283 lines
6.9 KiB
Diff
283 lines
6.9 KiB
Diff
--- a/arch/arm/mach-ixp4xx/Kconfig
|
|
+++ b/arch/arm/mach-ixp4xx/Kconfig
|
|
@@ -8,6 +8,14 @@ menu "Intel IXP4xx Implementation Option
|
|
|
|
comment "IXP4xx Platforms"
|
|
|
|
+config MACH_AP42X
|
|
+ bool "Tonze AP-422/425"
|
|
+ select PCI
|
|
+ help
|
|
+ Say 'Y' here if you want your kernel to support Tonze's
|
|
+ AP-422/425 boards. For more information on this platform,
|
|
+ see http://tonze.com.tw
|
|
+
|
|
config MACH_NSLU2
|
|
bool
|
|
prompt "Linksys NSLU2"
|
|
--- a/arch/arm/mach-ixp4xx/Makefile
|
|
+++ b/arch/arm/mach-ixp4xx/Makefile
|
|
@@ -5,6 +5,7 @@
|
|
obj-pci-y :=
|
|
obj-pci-n :=
|
|
|
|
+obj-pci-$(CONFIG_MACH_AP42X) += ap42x-pci.o
|
|
obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o
|
|
obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
|
|
obj-pci-$(CONFIG_MACH_CAMBRIA) += cambria-pci.o
|
|
@@ -32,6 +33,7 @@ obj-pci-$(CONFIG_MACH_USR8200) += usr82
|
|
|
|
obj-y += common.o
|
|
|
|
+obj-$(CONFIG_MACH_AP42X) += ap42x-setup.o
|
|
obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o
|
|
obj-$(CONFIG_MACH_AVILA) += avila-setup.o
|
|
obj-$(CONFIG_MACH_CAMBRIA) += cambria-setup.o
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-ixp4xx/ap42x-pci.c
|
|
@@ -0,0 +1,63 @@
|
|
+/*
|
|
+ * arch/arch/mach-ixp4xx/ap42x-pci.c
|
|
+ *
|
|
+ * PCI setup routines for Tonze AP-422/425
|
|
+ *
|
|
+ * Copyright (C) 2012 Imre Kaloz <kaloz@openwrt.org>
|
|
+ *
|
|
+ * based on coyote-pci.c:
|
|
+ * Copyright (C) 2002 Jungo Software Technologies.
|
|
+ * Copyright (C) 2003 MontaVista Softwrae, Inc.
|
|
+ *
|
|
+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
+ * it under the terms of the GNU General Public License version 2 as
|
|
+ * published by the Free Software Foundation.
|
|
+ *
|
|
+ */
|
|
+
|
|
+#include <linux/kernel.h>
|
|
+#include <linux/pci.h>
|
|
+#include <linux/init.h>
|
|
+#include <linux/irq.h>
|
|
+
|
|
+#include <asm/mach-types.h>
|
|
+#include <mach/hardware.h>
|
|
+
|
|
+#include <asm/mach/pci.h>
|
|
+
|
|
+void __init ap42x_pci_preinit(void)
|
|
+{
|
|
+ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
|
|
+ irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
|
|
+
|
|
+ ixp4xx_pci_preinit();
|
|
+}
|
|
+
|
|
+static int __init ap42x_map_irq(const struct pci_dev *dev, u8 slot,
|
|
+ u8 pin)
|
|
+{
|
|
+ if (slot == 1)
|
|
+ return IRQ_IXP4XX_GPIO11;
|
|
+ else if (slot == 2)
|
|
+ return IRQ_IXP4XX_GPIO10;
|
|
+ else return -1;
|
|
+}
|
|
+
|
|
+struct hw_pci ap42x_pci __initdata = {
|
|
+ .nr_controllers = 1,
|
|
+ .preinit = ap42x_pci_preinit,
|
|
+ .ops = &ixp4xx_ops,
|
|
+ .setup = ixp4xx_setup,
|
|
+ .map_irq = ap42x_map_irq,
|
|
+};
|
|
+
|
|
+int __init ap42x_pci_init(void)
|
|
+{
|
|
+ if (machine_is_ap42x())
|
|
+ pci_common_init(&ap42x_pci);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+subsys_initcall(ap42x_pci_init);
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-ixp4xx/ap42x-setup.c
|
|
@@ -0,0 +1,166 @@
|
|
+/*
|
|
+ * arch/arm/mach-ixp4xx/ap42x-setup.c
|
|
+ *
|
|
+ * Board setup for the Tonze AP-42x boards
|
|
+ *
|
|
+ * Copyright (C) 2012 Imre Kaloz <kaloz@openwrt.org>
|
|
+ *
|
|
+ * based on coyote-setup.c:
|
|
+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
|
|
+ *
|
|
+ * Author: Imre Kaloz <Kaloz@openwrt.org>
|
|
+ */
|
|
+
|
|
+#include <linux/kernel.h>
|
|
+#include <linux/init.h>
|
|
+#include <linux/device.h>
|
|
+#include <linux/serial.h>
|
|
+#include <linux/tty.h>
|
|
+#include <linux/serial_8250.h>
|
|
+#include <linux/mtd/physmap.h>
|
|
+#include <linux/dma-mapping.h>
|
|
+
|
|
+#include <asm/types.h>
|
|
+#include <asm/setup.h>
|
|
+#include <asm/memory.h>
|
|
+#include <mach/hardware.h>
|
|
+#include <asm/irq.h>
|
|
+#include <asm/mach-types.h>
|
|
+#include <asm/mach/arch.h>
|
|
+#include <asm/mach/flash.h>
|
|
+
|
|
+static struct mtd_partition ap42x_flash_partitions[] = {
|
|
+ {
|
|
+ .name = "RedBoot",
|
|
+ .offset = 0x00000000,
|
|
+ .size = 0x00080000,
|
|
+ }, {
|
|
+ .name = "linux",
|
|
+ .offset = 0x00080000,
|
|
+ .size = 0x00100000,
|
|
+ }, {
|
|
+ .name = "rootfs",
|
|
+ .offset = 0x00180000,
|
|
+ .size = 0x00660000,
|
|
+ }, {
|
|
+ .name = "FIS directory",
|
|
+ .offset = 0x007f8000,
|
|
+ .size = 0x00007000,
|
|
+ }, {
|
|
+ .name = "RedBoot config",
|
|
+ .offset = 0x007ff000,
|
|
+ .size = 0x00001000,
|
|
+ },
|
|
+};
|
|
+
|
|
+static struct physmap_flash_data ap42x_flash_data = {
|
|
+ .width = 2,
|
|
+ .parts = ap42x_flash_partitions,
|
|
+ .nr_parts = ARRAY_SIZE(ap42x_flash_partitions),
|
|
+};
|
|
+
|
|
+static struct resource ap42x_flash_resource = {
|
|
+ .flags = IORESOURCE_MEM,
|
|
+ .start = IXP4XX_EXP_BUS_BASE_PHYS,
|
|
+ .end = IXP4XX_EXP_BUS_BASE_PHYS + SZ_8M - 1,
|
|
+};
|
|
+
|
|
+static struct platform_device ap42x_flash = {
|
|
+ .name = "physmap-flash",
|
|
+ .id = 0,
|
|
+ .dev = {
|
|
+ .platform_data = &ap42x_flash_data,
|
|
+ },
|
|
+ .num_resources = 1,
|
|
+ .resource = &ap42x_flash_resource,
|
|
+};
|
|
+
|
|
+static struct resource ap42x_uart_resource = {
|
|
+ .start = IXP4XX_UART2_BASE_PHYS,
|
|
+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
|
|
+ .flags = IORESOURCE_MEM,
|
|
+};
|
|
+
|
|
+static struct plat_serial8250_port ap42x_uart_data[] = {
|
|
+ {
|
|
+ .mapbase = IXP4XX_UART2_BASE_PHYS,
|
|
+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
|
|
+ .irq = IRQ_IXP4XX_UART2,
|
|
+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
|
|
+ .iotype = UPIO_MEM,
|
|
+ .regshift = 2,
|
|
+ .uartclk = IXP4XX_UART_XTAL,
|
|
+ },
|
|
+ { },
|
|
+};
|
|
+
|
|
+static struct platform_device ap42x_uart = {
|
|
+ .name = "serial8250",
|
|
+ .id = PLAT8250_DEV_PLATFORM,
|
|
+ .dev = {
|
|
+ .platform_data = ap42x_uart_data,
|
|
+ },
|
|
+ .num_resources = 1,
|
|
+ .resource = &ap42x_uart_resource,
|
|
+};
|
|
+
|
|
+static struct eth_plat_info ap42x_plat_eth[] = {
|
|
+ {
|
|
+ .phy = 2,
|
|
+ .rxq = 3,
|
|
+ .txreadyq = 20,
|
|
+ }, {
|
|
+ .phy = 1,
|
|
+ .rxq = 4,
|
|
+ .txreadyq = 21,
|
|
+ }
|
|
+};
|
|
+
|
|
+static struct platform_device ap42x_eth[] = {
|
|
+ {
|
|
+ .name = "ixp4xx_eth",
|
|
+ .id = IXP4XX_ETH_NPEB,
|
|
+ .dev.platform_data = ap42x_plat_eth,
|
|
+ .dev.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
+ }, {
|
|
+ .name = "ixp4xx_eth",
|
|
+ .id = IXP4XX_ETH_NPEC,
|
|
+ .dev.platform_data = ap42x_plat_eth + 1,
|
|
+ .dev.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
+ }
|
|
+};
|
|
+
|
|
+static struct platform_device *ap42x_devices[] __initdata = {
|
|
+ &ap42x_flash,
|
|
+ &ap42x_uart,
|
|
+ &ap42x_eth[0],
|
|
+ &ap42x_eth[1],
|
|
+};
|
|
+
|
|
+static void __init ap42x_init(void)
|
|
+{
|
|
+ ixp4xx_sys_init();
|
|
+
|
|
+ ap42x_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
|
|
+ ap42x_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
|
|
+
|
|
+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
|
|
+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
|
|
+
|
|
+ platform_add_devices(ap42x_devices, ARRAY_SIZE(ap42x_devices));
|
|
+}
|
|
+
|
|
+#ifdef CONFIG_MACH_AP42X
|
|
+MACHINE_START(AP42X, "Tonze AP-422/425")
|
|
+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
|
|
+ .map_io = ixp4xx_map_io,
|
|
+ .init_irq = ixp4xx_init_irq,
|
|
+ .init_time = ixp4xx_timer_init,
|
|
+ .atag_offset = 0x100,
|
|
+ .init_machine = ap42x_init,
|
|
+#if defined(CONFIG_PCI)
|
|
+ .dma_zone_size = SZ_64M,
|
|
+#endif
|
|
+ .restart = ixp4xx_restart,
|
|
+MACHINE_END
|
|
+#endif
|
|
--- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h
|
|
+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
|
|
@@ -45,7 +45,8 @@ static __inline__ void __arch_decomp_set
|
|
machine_is_devixp() || machine_is_miccpt() || machine_is_mic256() ||
|
|
machine_is_pronghorn() || machine_is_pronghorn_metro() ||
|
|
machine_is_wrt300nv2() || machine_is_tw5334() ||
|
|
- machine_is_usr8200() || machine_is_tw2662())
|
|
+ machine_is_usr8200() || machine_is_tw2662() ||
|
|
+ machine_is_ap42x())
|
|
uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
|
|
else
|
|
uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
|