Jonathan A. Kollasch b4e0d6735b ath79: fix eth0 PLL registers on WD My Net Wi-Fi Range Extender
This replaces the register bits for RGMII delay on the MAC side in favor
of having the RGMII delay on the PHY side by setting the phy-mode
property to rgmii-id (RGMII internal delay), which is supported by the
at803x driver.  Speed 1000 is fixed as a result, so now all ethernet
speeds function.

Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-by: Michael Pratt <mcpratt@pm.me>
Signed-off-by: maurerr <mariusd84@gmail.com>
2021-09-01 08:08:11 +00:00
..
2021-09-01 08:08:10 +00:00
2021-09-01 08:08:10 +00:00
2021-09-01 08:07:58 +00:00
2021-09-01 08:07:58 +00:00