openwrt/target/linux/mediatek/patches-4.9/0010-clk-add-hifsys-reset.patch
John Crispin 1f068588ef mediatek: update to latest kernel patchset from v4.13-rc
Signed-off-by: Muciri Gatimu <muciri@openmesh.com>
Signed-off-by: Shashidhar Lakkavalli <shashidhar.lakkavalli@openmesh.com>
Signed-off-by: John Crispin <john@phrozen.org>
2017-08-18 18:41:41 +02:00

31 lines
866 B
Diff

From 600e2bd5c3019f31e90ec876f4efb6c209cf0d73 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 6 Jan 2016 20:06:49 +0100
Subject: [PATCH 10/57] clk: add hifsys reset
Hi,
small patch to add hifsys reset bits. Maybe you could add it to the next
version of your patch series. i have teste scpsys and clk on mt7623 today
and it works well.
thanks,
John
Signed-off-by: John Crispin <blogic@openwrt.org>
---
drivers/clk/mediatek/clk-mt2701.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -1000,6 +1000,8 @@ static void __init mtk_hifsys_init(struc
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+ mtk_register_reset_controller(node, 1, 0x34);
}
CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init);