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73eeac49be
In the past few years, we have received several reports about SPI Flash not working properly. This is caused by excessively fast clock frequency. It's really annoying to fix them one by one. Let's reduce these aggressive frequencies to 50 MHz. This is a safe and suggested value in the vendor SDK. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
202 lines
3.1 KiB
Plaintext
202 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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aliases {
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led-boot = &led_system_amber;
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led-failsafe = &led_system_amber;
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led-running = &led_system_green;
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led-upgrade = &led_system_amber;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_system_green: system_green {
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label = "green:system";
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gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
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};
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led_system_amber: system_amber {
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label = "amber:system";
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gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
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};
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internet_green {
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label = "green:internet";
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gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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};
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internet_amber {
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label = "amber:internet";
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gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
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};
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lan1 {
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label = "amber:lan1";
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gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
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};
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lan2 {
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label = "amber:lan2";
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gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
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};
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lan3 {
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label = "amber:lan3";
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gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
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};
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lan4 {
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label = "amber:lan4";
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gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
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};
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wan {
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function = LED_FUNCTION_WAN;
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color = <LED_COLOR_ID_AMBER>;
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gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
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};
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wlan2g {
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label = "green:wlan2g";
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "config";
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reg = <0x30000 0x10000>;
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read-only;
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};
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partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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eeprom_factory_8000: eeprom@8000 {
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reg = <0x8000 0x200>;
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};
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macaddr_factory_28: macaddr@28 {
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reg = <0x28 0x6>;
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};
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};
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xfb0000>;
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};
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};
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};
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};
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&state_default {
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gpio {
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groups = "uartf", "rgmii1", "wled";
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function = "gpio";
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};
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&ephy_pins>;
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mediatek,portmap = "wllll";
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nvmem-cells = <&macaddr_factory_28>;
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nvmem-cell-names = "mac-address";
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};
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&sdhci {
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status = "okay";
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_8000>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <5000000 6000000>;
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led {
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led-sources = <0>;
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led-active-low;
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};
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};
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};
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&wmac {
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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};
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