openwrt/target/linux/ramips/dts/mt7620a_dlink_dwr-96x.dtsi
Pawel Dembicki be89c9eec4 ramips: mt7620: Add support for D-Link DWR-961 A1
The DWR-961 A1 Wireless Router is based on the MT7620A SoC.
It's a merge of two Amit boards: DWR-960 with ethernet part
of Lava LR-25G001.

ROMID it's taken from Telenor branded version and it works with tested
device. Images from D-Link site for this router are from DWR-953 and it
have ROMID DLK6E2424001. I don't know if it's mistake on web-site
or if it's will require different image.

Specification:

- MediaTek MT7620A (580 Mhz)
- 128 MB of RAM
- 16 MB of FLASH
- 1x 802.11bgn radio
- 1x 802.11ac radio (MT7612 mpcie card)
- 5x 10/100/1000 Mbps Ethernet: 4xLAN and 1xWAN (QCA8337)
- 2x internal, non-detachable antennas (Wifi 2.4G)
- 3x external, detachable antennas (2x LTE, 1x Wifi 5G)
- 1x LTE modem cat 6
- UART (J5) header on PCB (57600 8n1)
- 13x LED, 2x button
- JBOOT bootloader

Installation:
Apply factory image via http web-gui or JBOOT recovery page

How to revert to OEM firmware:
- push the reset button and turn on the power. Wait until LED start
  blinking (~10sec.)
- upload original factory image via JBOOT http (IP: 192.168.123.254)

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
2022-03-16 22:31:14 +09:00

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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* D-Link DWR-96x Common Board Description
* Copyright 2022 Pawel Dembicki <paweldembicki@gmail.com>
*/
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/mtd/partitions/uimage.h>
/ {
aliases {
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_status: status {
label = "green:status";
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
};
wan {
label = "green:wan";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
};
lan {
label = "green:lan";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
};
sms {
label = "green:sms";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
signal_green {
label = "green:signal";
gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
};
signal_red {
label = "red:signal";
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
};
4g {
label = "green:4g";
gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
};
3g {
label = "green:3g";
gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
};
wlan5g {
label = "green:wlan5g";
gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wlan2g {
label = "green:wlan2g";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
};
&ehci {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&ohci {
status = "okay";
};
&pcie {
status = "okay";
};
&pcie0 {
wifi: wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
nvmem-cells = <&macaddr_config_e50e>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(2)>;
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "jboot";
reg = <0x0 0x10000>;
read-only;
};
partition@10000 {
compatible = "openwrt,uimage", "denx,uimage";
openwrt,ih-magic = <IH_MAGIC_OKLI>;
openwrt,offset = <0x10000>;
label = "firmware";
reg = <0x10000 0xfe0000>;
};
config: partition@ff0000 {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
label = "config";
reg = <0xff0000 0x10000>;
read-only;
macaddr_config_e50e: macaddr@e50e {
reg = <0xe50e 0x6>;
};
};
};
};
};
&state_default {
default {
groups = "i2c", "wled", "spi refclk", "uartf", "ephy";
function = "gpio";
};
};