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197 lines
6.2 KiB
Diff
197 lines
6.2 KiB
Diff
From 7cfe2dfe5ac7c72b904e4b59b240caa42721ee07 Mon Sep 17 00:00:00 2001
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From: Claudiu Beznea <claudiu.beznea@microchip.com>
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Date: Thu, 19 Nov 2020 17:43:13 +0200
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Subject: [PATCH 107/247] clk: at91: sama7g5: remove mck0 from parent list of
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other clocks
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MCK0 is changed at runtime by DVFS. Due to this, since not all IPs
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are glitch free aware at MCK0 changes, remove MCK0 from parent list
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of other clocks (e.g. generic clock, programmable/system clock, MCKX).
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Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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Link: https://lore.kernel.org/r/1605800597-16720-8-git-send-email-claudiu.beznea@microchip.com
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/at91/sama7g5.c | 55 ++++++++++++++++++--------------------
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1 file changed, 26 insertions(+), 29 deletions(-)
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--- a/drivers/clk/at91/sama7g5.c
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+++ b/drivers/clk/at91/sama7g5.c
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@@ -280,7 +280,7 @@ static const struct {
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.ep = { "syspll_divpmcck", "ddrpll_divpmcck", "imgpll_divpmcck", },
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.ep_mux_table = { 5, 6, 7, },
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.ep_count = 3,
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- .ep_chg_id = 6, },
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+ .ep_chg_id = 5, },
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{ .n = "mck4",
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.id = 4,
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@@ -313,7 +313,7 @@ static const struct {
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};
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/* Mux table for programmable clocks. */
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-static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 3, 5, 6, 7, 8, 9, 10, };
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+static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
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/**
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* Peripheral clock description
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@@ -436,7 +436,7 @@ static const struct {
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.pp = { "audiopll_divpmcck", },
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.pp_mux_table = { 9, },
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.pp_count = 1,
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- .pp_chg_id = 4, },
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+ .pp_chg_id = 3, },
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{ .n = "csi_gclk",
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.id = 33,
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@@ -548,7 +548,7 @@ static const struct {
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.pp = { "ethpll_divpmcck", },
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.pp_mux_table = { 10, },
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.pp_count = 1,
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- .pp_chg_id = 4, },
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+ .pp_chg_id = 3, },
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{ .n = "gmac1_gclk",
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.id = 52,
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@@ -580,7 +580,7 @@ static const struct {
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.pp = { "syspll_divpmcck", "audiopll_divpmcck", },
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.pp_mux_table = { 5, 9, },
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.pp_count = 2,
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- .pp_chg_id = 5, },
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+ .pp_chg_id = 4, },
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{ .n = "i2smcc1_gclk",
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.id = 58,
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@@ -588,7 +588,7 @@ static const struct {
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.pp = { "syspll_divpmcck", "audiopll_divpmcck", },
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.pp_mux_table = { 5, 9, },
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.pp_count = 2,
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- .pp_chg_id = 5, },
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+ .pp_chg_id = 4, },
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{ .n = "mcan0_gclk",
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.id = 61,
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@@ -730,7 +730,7 @@ static const struct {
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.pp = { "syspll_divpmcck", "baudpll_divpmcck", },
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.pp_mux_table = { 5, 8, },
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.pp_count = 2,
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- .pp_chg_id = 5, },
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+ .pp_chg_id = 4, },
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{ .n = "sdmmc1_gclk",
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.id = 81,
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@@ -738,7 +738,7 @@ static const struct {
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.pp = { "syspll_divpmcck", "baudpll_divpmcck", },
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.pp_mux_table = { 5, 8, },
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.pp_count = 2,
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- .pp_chg_id = 5, },
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+ .pp_chg_id = 4, },
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{ .n = "sdmmc2_gclk",
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.id = 82,
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@@ -746,7 +746,7 @@ static const struct {
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.pp = { "syspll_divpmcck", "baudpll_divpmcck", },
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.pp_mux_table = { 5, 8, },
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.pp_count = 2,
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- .pp_chg_id = 5, },
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+ .pp_chg_id = 4, },
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{ .n = "spdifrx_gclk",
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.id = 84,
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@@ -754,7 +754,7 @@ static const struct {
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.pp = { "syspll_divpmcck", "audiopll_divpmcck", },
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.pp_mux_table = { 5, 9, },
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.pp_count = 2,
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- .pp_chg_id = 5, },
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+ .pp_chg_id = 4, },
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{ .n = "spdiftx_gclk",
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.id = 85,
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@@ -762,7 +762,7 @@ static const struct {
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.pp = { "syspll_divpmcck", "audiopll_divpmcck", },
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.pp_mux_table = { 5, 9, },
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.pp_count = 2,
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- .pp_chg_id = 5, },
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+ .pp_chg_id = 4, },
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{ .n = "tcb0_ch0_gclk",
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.id = 88,
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@@ -961,9 +961,8 @@ static void __init sama7g5_pmc_setup(str
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parent_names[0] = md_slck_name;
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parent_names[1] = td_slck_name;
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parent_names[2] = "mainck";
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- parent_names[3] = "mck0";
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for (i = 0; i < ARRAY_SIZE(sama7g5_mckx); i++) {
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- u8 num_parents = 4 + sama7g5_mckx[i].ep_count;
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+ u8 num_parents = 3 + sama7g5_mckx[i].ep_count;
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u32 *mux_table;
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mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
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@@ -971,10 +970,10 @@ static void __init sama7g5_pmc_setup(str
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if (!mux_table)
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goto err_free;
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- SAMA7G5_INIT_TABLE(mux_table, 4);
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- SAMA7G5_FILL_TABLE(&mux_table[4], sama7g5_mckx[i].ep_mux_table,
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+ SAMA7G5_INIT_TABLE(mux_table, 3);
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+ SAMA7G5_FILL_TABLE(&mux_table[3], sama7g5_mckx[i].ep_mux_table,
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sama7g5_mckx[i].ep_count);
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- SAMA7G5_FILL_TABLE(&parent_names[4], sama7g5_mckx[i].ep,
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+ SAMA7G5_FILL_TABLE(&parent_names[3], sama7g5_mckx[i].ep,
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sama7g5_mckx[i].ep_count);
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hw = at91_clk_sama7g5_register_master(regmap, sama7g5_mckx[i].n,
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@@ -997,20 +996,19 @@ static void __init sama7g5_pmc_setup(str
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parent_names[0] = md_slck_name;
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parent_names[1] = td_slck_name;
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parent_names[2] = "mainck";
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- parent_names[3] = "mck0";
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- parent_names[4] = "syspll_divpmcck";
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- parent_names[5] = "ddrpll_divpmcck";
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- parent_names[6] = "imgpll_divpmcck";
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- parent_names[7] = "baudpll_divpmcck";
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- parent_names[8] = "audiopll_divpmcck";
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- parent_names[9] = "ethpll_divpmcck";
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+ parent_names[3] = "syspll_divpmcck";
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+ parent_names[4] = "ddrpll_divpmcck";
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+ parent_names[5] = "imgpll_divpmcck";
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+ parent_names[6] = "baudpll_divpmcck";
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+ parent_names[7] = "audiopll_divpmcck";
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+ parent_names[8] = "ethpll_divpmcck";
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for (i = 0; i < 8; i++) {
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char name[6];
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snprintf(name, sizeof(name), "prog%d", i);
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hw = at91_clk_register_programmable(regmap, name, parent_names,
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- 10, i,
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+ 9, i,
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&programmable_layout,
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sama7g5_prog_mux_table);
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if (IS_ERR(hw))
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@@ -1047,9 +1045,8 @@ static void __init sama7g5_pmc_setup(str
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parent_names[0] = md_slck_name;
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parent_names[1] = td_slck_name;
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parent_names[2] = "mainck";
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- parent_names[3] = "mck0";
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for (i = 0; i < ARRAY_SIZE(sama7g5_gck); i++) {
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- u8 num_parents = 4 + sama7g5_gck[i].pp_count;
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+ u8 num_parents = 3 + sama7g5_gck[i].pp_count;
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u32 *mux_table;
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mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
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@@ -1057,10 +1054,10 @@ static void __init sama7g5_pmc_setup(str
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if (!mux_table)
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goto err_free;
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- SAMA7G5_INIT_TABLE(mux_table, 4);
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- SAMA7G5_FILL_TABLE(&mux_table[4], sama7g5_gck[i].pp_mux_table,
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+ SAMA7G5_INIT_TABLE(mux_table, 3);
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+ SAMA7G5_FILL_TABLE(&mux_table[3], sama7g5_gck[i].pp_mux_table,
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sama7g5_gck[i].pp_count);
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- SAMA7G5_FILL_TABLE(&parent_names[4], sama7g5_gck[i].pp,
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+ SAMA7G5_FILL_TABLE(&parent_names[3], sama7g5_gck[i].pp,
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sama7g5_gck[i].pp_count);
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hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
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