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f1525e785e
Backport below changes for GigaDevice GD25Q256 support from v4.15: e27072851bf7 mtd: spi-nor: add a quad_enable callback in struct flash_info 65153846b18c mtd: spi-nor: add support for GD25Q256 This chip is used on newer Quad-E4G boards. Before: [ 2.366493] m25p80 spi0.0: unrecognized JEDEC id bytes: c8, 40, 19 [ 2.372853] m25p80: probe of spi0.0 failed with error -2 After: [ 2.371722] m25p80 spi0.0: gd25q256 (32768 Kbytes) [ 2.376694] 5 fixed-partitions partitions found on MTD device spi0.0 [ 2.383043] Creating 5 MTD partitions on "spi0.0": [ 2.387824] 0x000000000000-0x000000030000 : "u-boot" [ 2.394138] 0x000000030000-0x000000031000 : "u-boot-env" [ 2.400608] 0x000000031000-0x000000040000 : "config" [ 2.406830] 0x000000040000-0x000000050000 : "factory" [ 2.413169] 0x000000050000-0x000002000000 : "firmware" Signed-off-by: Kuan-Yi Li <kyli@abysm.org>
73 lines
2.6 KiB
Diff
73 lines
2.6 KiB
Diff
This hack can be dropped after the next stable release from
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v5.x-tree.
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The problem was fixed upstream by
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commit 2bffa65da43e ("mtd: spi-nor: Add a post BFPT fixup for MX25L25635E")
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For reference see:
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<https://github.com/openwrt/openwrt/pull/1743>
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -1113,6 +1113,7 @@ static const struct flash_info spi_nor_i
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{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
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{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
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{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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+ { "mx25l25635f", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
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{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
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{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
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{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
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@@ -1282,11 +1283,12 @@ static const struct flash_info spi_nor_i
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{ },
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};
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-static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
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+static const struct flash_info *spi_nor_read_id(struct spi_nor *nor,
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+ const char *name)
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{
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int tmp;
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u8 id[SPI_NOR_MAX_ID_LEN];
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- const struct flash_info *info;
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+ const struct flash_info *info, *first_match = NULL;
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tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
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if (tmp < 0) {
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@@ -1297,10 +1299,16 @@ static const struct flash_info *spi_nor_
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for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) {
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info = &spi_nor_ids[tmp];
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if (info->id_len) {
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- if (!memcmp(info->id, id, info->id_len))
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- return &spi_nor_ids[tmp];
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+ if (!memcmp(info->id, id, info->id_len)) {
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+ if (!name || !strcmp(name, info->name))
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+ return info;
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+ if (!first_match)
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+ first_match = info;
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+ }
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}
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}
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+ if (first_match)
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+ return first_match;
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dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
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id[0], id[1], id[2]);
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return ERR_PTR(-ENODEV);
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@@ -2789,7 +2797,7 @@ int spi_nor_scan(struct spi_nor *nor, co
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info = spi_nor_match_id(name);
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/* Try to auto-detect if chip name wasn't specified or not found */
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if (!info)
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- info = spi_nor_read_id(nor);
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+ info = spi_nor_read_id(nor, NULL);
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if (IS_ERR_OR_NULL(info))
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return -ENOENT;
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@@ -2800,7 +2808,7 @@ int spi_nor_scan(struct spi_nor *nor, co
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if (name && info->id_len) {
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const struct flash_info *jinfo;
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- jinfo = spi_nor_read_id(nor);
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+ jinfo = spi_nor_read_id(nor, name);
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if (IS_ERR(jinfo)) {
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return PTR_ERR(jinfo);
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} else if (jinfo != info) {
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