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621297e867
The "/dts-v1/;" identifier is supposed to be present once at the top of a device tree file after the includes have been processed. In ramips, we therefore requested to have in the DTS files so far, and omit it in the DTSI files. However, essentially the syntax of the parent mtxxxx/rtxxxx DTSI files already determines the DTS version, so putting it into the DTS files is just a useless repetition. Consequently, this patch puts the dts-v1 statement into the top-level SoC-based DTSI files, and removes all other occurences. Since the dts-v1 statement needs to be before any other definitions, this also moves the includes accordingly where necessary. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
116 lines
1.7 KiB
Plaintext
116 lines
1.7 KiB
Plaintext
#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "ralink,mt7620a-v22sg-evb", "ralink,mt7620a-soc";
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model = "Ralink MT7620a V22SG High Power evaluation board";
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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aoss {
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label = "aoss";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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nand {
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compatible = "mtk,mt7620-nand";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x40000 0x20000>;
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read-only;
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};
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factory: partition@60000 {
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label = "factory";
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reg = <0x60000 0x20000>;
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read-only;
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};
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partition@80000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x80000 0x7f80000>;
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};
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};
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "uartf", "spi";
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function = "gpio";
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};
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
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mediatek,portmap = "llllw";
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port@4 {
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status = "okay";
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phy-handle = <&phy4>;
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phy-mode = "rgmii";
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};
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port@5 {
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status = "okay";
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phy-handle = <&phy5>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "rgmii";
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};
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phy5: ethernet-phy@5 {
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reg = <5>;
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phy-mode = "rgmii";
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};
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};
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};
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&gsw {
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mediatek,port4 = "gmac";
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};
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&pcie {
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status = "okay";
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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