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f04e377a50
QCA808x does not currently fill in the possible_interfaces. This leads to Phylink not being aware that it supports 2500Base-X as well so in cases where it is connected to a DSA switch like MV88E6393 it will limit that port to phy-mode set in the DTS. That means that if SGMII is used you are limited to 1G only while if 2500Base-X was set you are limited to 2.5G only. Populating the possible_interfaces fixes this, so lets backport the patches from kernel 6.9. This also includes a backport of the Phylink PHY validation series from kernel 6.8 that allows the use of possible_interfaces. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko <robimarko@gmail.com>
77 lines
2.6 KiB
Diff
77 lines
2.6 KiB
Diff
From d4788b4383ce5caeb4e68818357c81a02117a3f9 Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Fri, 24 Nov 2023 12:28:19 +0000
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Subject: [PATCH 3/7] net: phylink: split out per-interface validation
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Split out the internals of phylink_validate_mask() to make the code
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easier to read.
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Tested-by: Luo Jie <quic_luoj@quicinc.com>
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Link: https://lore.kernel.org/r/E1r6VIB-00DDLr-7g@rmk-PC.armlinux.org.uk
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/phy/phylink.c | 42 ++++++++++++++++++++++++++++-----------
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1 file changed, 30 insertions(+), 12 deletions(-)
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--- a/drivers/net/phy/phylink.c
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+++ b/drivers/net/phy/phylink.c
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@@ -682,26 +682,44 @@ static int phylink_validate_mac_and_pcs(
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return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
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}
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+static void phylink_validate_one(struct phylink *pl,
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+ const unsigned long *supported,
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+ const struct phylink_link_state *state,
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+ phy_interface_t interface,
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+ unsigned long *accum_supported,
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+ unsigned long *accum_advertising)
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+{
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+ __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
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+ struct phylink_link_state tmp_state;
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+
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+ linkmode_copy(tmp_supported, supported);
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+
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+ tmp_state = *state;
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+ tmp_state.interface = interface;
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+
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+ if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
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+ phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
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+ interface, phy_modes(interface),
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+ phy_rate_matching_to_str(tmp_state.rate_matching),
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+ __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
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+
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+ linkmode_or(accum_supported, accum_supported, tmp_supported);
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+ linkmode_or(accum_advertising, accum_advertising,
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+ tmp_state.advertising);
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+ }
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+}
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+
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static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
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struct phylink_link_state *state,
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const unsigned long *interfaces)
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{
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__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
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__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
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- __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
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- struct phylink_link_state t;
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int interface;
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- for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) {
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- linkmode_copy(s, supported);
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-
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- t = *state;
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- t.interface = interface;
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- if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
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- linkmode_or(all_s, all_s, s);
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- linkmode_or(all_adv, all_adv, t.advertising);
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- }
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- }
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+ for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
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+ phylink_validate_one(pl, supported, state, interface,
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+ all_s, all_adv);
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linkmode_copy(supported, all_s);
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linkmode_copy(state->advertising, all_adv);
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