mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 16:31:13 +00:00
b5f32064ed
Qualcomm Atheros IPQ807x is a modern WiSoC featuring: * Quad Core ARMv8 Cortex A-53 * @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye * @ 1.4 GHz (IPQ8070A/1A) Codename Acorn * Dual Band simultaneaous IEEE 802.11ax * 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A) * 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A) * 5G: 2x2/80MHz (IPQ8070A) * 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A) * 2G: 2x2/40MHz (IPQ8070A/1A) * 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports) * 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye * 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn * DDR3L/4 32/16 bit up to 2400MT/s * SDIO 3.0/SD card 3.0/eMMC 5.1 * Dual USB 3.0 * One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane) * Parallel NAND (ONFI)/LCD * 6x QUP BLSP SPI/I2C/UART * I2S, PCM, and TDMA * HW PWM * 1.8V configurable GPIO * Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc) Note that only v2 SOC models aka the ones ending with A suffix are supported, v1 models do not comply to the final 802.11ax and have lower clocks, lack the Gen3 PCIe etc. SoC itself has two UBI32 cores for the NSS offloading system, however currently no offloading is supported. Signed-off-by: Robert Marko <robimarko@gmail.com>
47 lines
1.2 KiB
Diff
47 lines
1.2 KiB
Diff
From 132b2f15b8ae3f848b3e6f2962f409cfab0ca759 Mon Sep 17 00:00:00 2001
|
|
From: Robert Marko <robimarko@gmail.com>
|
|
Date: Fri, 30 Dec 2022 23:33:47 +0100
|
|
Subject: [PATCH] cpufreq: qcom-nvmem: use SoC ID-s from bindings
|
|
|
|
SMEM SoC ID-s are now stored in DT bindings so lets use those instead of
|
|
defining them in the driver again.
|
|
|
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
|
---
|
|
drivers/cpufreq/qcom-cpufreq-nvmem.c | 15 +++++----------
|
|
1 file changed, 5 insertions(+), 10 deletions(-)
|
|
|
|
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
|
|
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
|
|
@@ -30,12 +30,7 @@
|
|
#include <linux/soc/qcom/smem.h>
|
|
#include <linux/soc/qcom/socinfo.h>
|
|
|
|
-enum _msm_id {
|
|
- MSM8996V3 = 0xF6ul,
|
|
- APQ8096V3 = 0x123ul,
|
|
- MSM8996SG = 0x131ul,
|
|
- APQ8096SG = 0x138ul,
|
|
-};
|
|
+#include <dt-bindings/arm/qcom,ids.h>
|
|
|
|
enum _msm8996_version {
|
|
MSM8996_V3,
|
|
@@ -152,12 +147,12 @@ static enum _msm8996_version qcom_cpufre
|
|
return NUM_OF_MSM8996_VERSIONS;
|
|
|
|
switch (info->id) {
|
|
- case MSM8996V3:
|
|
- case APQ8096V3:
|
|
+ case QCOM_ID_MSM8996:
|
|
+ case QCOM_ID_APQ8096:
|
|
version = MSM8996_V3;
|
|
break;
|
|
- case MSM8996SG:
|
|
- case APQ8096SG:
|
|
+ case QCOM_ID_MSM8996SG:
|
|
+ case QCOM_ID_APQ8096SG:
|
|
version = MSM8996_SG;
|
|
break;
|
|
default:
|