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https://github.com/openwrt/openwrt.git
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b530d492a9
Hardware specification:
* SoC: MediaTek MT7986A 4x A53
* Flash: 8GB EMMC
* RAM: 1GB DDR4
* Ethernet:
* 2x2.5G RJ45 port (RTL8221B)
* 4x1G RJ45 ports (MT7531AE)
* WLAN:
* 2.4GHz: MT7976GN 4T4R
* 5GHz: MT7976AN 4T4R
* Button: Reset
* LED: 1 x dual color LED
* USB: 1 x USB 3.0
* Power: DC 12V 4A
* UART: 3V3 115200 8N1 (Pinout: GND TX RX VCC)
* JTAG: 9 PIN
If you want to use u-boot from OpenWrt, you can upgrade it safely.
* bl2: openwrt-mediatek-filogic-glinet_gl-mt6000-preloader.bin
* fip: openwrt-mediatek-filogic-glinet_gl-mt6000-bl31-uboot.fip
`openwrt-mediatek-filogic-glinet_gl-mt6000-squashfs-factory.bin` is used in OpenWrt's u-boot.
Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
(cherry picked from commit fe10f97439
)
307 lines
5.8 KiB
Plaintext
307 lines
5.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include "mt7986a.dtsi"
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/ {
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model = "GL.iNet GL-MT6000";
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compatible = "glinet,gl-mt6000", "mediatek,mt7986a";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs-append = " root=PARTLABEL=rootfs rootwait";
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1.8vd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_run: led@0 {
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label = "blue:run";
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gpios = <&pio 38 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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led@1 {
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label = "white:system";
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gpios = <&pio 37 GPIO_ACTIVE_LOW>;
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};
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};
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usb_vbus: regulator-usb-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-boot-on;
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "2500base-x";
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phy-handle = <&phy1>;
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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phy1: phy@1 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <1>;
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reset-assert-us = <100000>;
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reset-deassert-us = <100000>;
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reset-gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&pio>;
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interrupts = <46 IRQ_TYPE_LEVEL_LOW>;
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realtek,aldps-enable;
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};
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phy7: ethernet-phy@7 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <7>;
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reset-assert-us = <100000>;
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reset-deassert-us = <100000>;
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reset-gpios = <&pio 19 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&pio>;
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interrupts = <47 IRQ_TYPE_LEVEL_LOW>;
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realtek,aldps-enable;
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};
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switch: switch@31 {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan2";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan4";
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};
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port@3 {
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reg = <3>;
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label = "lan5";
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};
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port@5 {
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reg = <5>;
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label = "lan1";
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phy-handle = <&phy7>;
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phy-mode = "2500base-x";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&pio {
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wf_2g_5g_pins: wf_2g_5g-pins {
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mux {
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function = "wifi";
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groups = "wf_2g", "wf_5g";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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mmc0_pins_default: mmc0-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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};
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mmc0_pins_uhs: mmc0-uhs-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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};
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};
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&crypto {
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status = "okay";
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};
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&ssusb {
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vusb33-supply = <®_3p3v>;
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vbus-supply = <&usb_vbus>;
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status = "okay";
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};
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&trng {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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pinctrl-names = "default";
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pinctrl-0 = <&wf_2g_5g_pins>;
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status = "okay";
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};
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&mmc0 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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bus-width = <8>;
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max-frequency = <200000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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hs400-ds-delay = <0x14014>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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non-removable;
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no-sd;
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no-sdio;
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status = "okay";
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};
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