mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-29 18:19:02 +00:00
73eeac49be
In the past few years, we have received several reports about SPI Flash not working properly. This is caused by excessively fast clock frequency. It's really annoying to fix them one by one. Let's reduce these aggressive frequencies to 50 MHz. This is a safe and suggested value in the vendor SDK. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
156 lines
2.5 KiB
Plaintext
156 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
#include "mt7628an.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/leds/common.h>
|
|
|
|
/ {
|
|
model = "Motorola MWR03";
|
|
compatible = "motorola,mwr03", "mediatek,mt7628an-soc";
|
|
|
|
aliases {
|
|
led-boot = &led_status_orange;
|
|
led-failsafe = &led_status_orange;
|
|
led-running = &led_status_white;
|
|
led-upgrade = &led_status_orange;
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_status_orange: status_orange {
|
|
function = LED_FUNCTION_STATUS;
|
|
color = <LED_COLOR_ID_ORANGE>;
|
|
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led_status_white: status_white {
|
|
function = LED_FUNCTION_STATUS;
|
|
color = <LED_COLOR_ID_WHITE>;
|
|
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <50000000>;
|
|
m25p,fast-read;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "bootloader";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "config";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
eeprom_factory_0: eeprom@0 {
|
|
reg = <0x0 0x400>;
|
|
};
|
|
|
|
eeprom_factory_8000: eeprom@8000 {
|
|
reg = <0x8000 0x200>;
|
|
};
|
|
|
|
macaddr_factory_4: macaddr@4 {
|
|
compatible = "mac-base";
|
|
reg = <0x4 0x6>;
|
|
#nvmem-cell-cells = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x50000 0x7b0000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "i2c", "i2s";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
&usbphy {
|
|
status = "disabled";
|
|
};
|
|
|
|
&ehci {
|
|
status = "disabled";
|
|
};
|
|
|
|
&ohci {
|
|
status = "disabled";
|
|
};
|
|
|
|
ðernet {
|
|
nvmem-cells = <&macaddr_factory_4 (-1)>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&esw {
|
|
mediatek,portmap = <0x3e>;
|
|
mediatek,portdisable = <0x30>;
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
wifi@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
nvmem-cells = <&eeprom_factory_8000>;
|
|
nvmem-cell-names = "eeprom";
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
};
|
|
};
|
|
|
|
&wmac {
|
|
status = "okay";
|
|
|
|
nvmem-cells = <&eeprom_factory_0>;
|
|
nvmem-cell-names = "eeprom";
|
|
};
|