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a2d4b5711a
Removed upstreamed: pending-5.10/841-USB-serial-option-add-ZTE-MF286D-modem.patch[1] bcm27xx/950-0592-drm-vc4-Allow-DBLCLK-modes-even-if-horz-timing-is-od.patch[2] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.101&id=7113440a36c741efd7c76e3d70b3634100120cdb 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.101&id=21c890ca8eaecea06cabb92be2a53a6f26f56383 Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200 Run-tested: bcm2711/RPi4B, mt7622/RT3200 Signed-off-by: John Audia <graysky@archlinux.us>
98 lines
3.3 KiB
Diff
98 lines
3.3 KiB
Diff
From 1dd22d945a99fa35e387e01101c758ae7be3d9a4 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Tue, 15 Dec 2020 16:42:40 +0100
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Subject: [PATCH] drm/vc4: hdmi: Store pixel frequency in the connector
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state
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The pixel rate is for now quite simple to compute, but with more features
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(30 and 36 bits output, YUV output, etc.) will depend on a bunch of
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connectors properties.
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Let's store the rate we have to run the pixel clock at in our custom
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connector state, and compute it in atomic_check.
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Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
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Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hdmi.c | 26 +++++++++++++++++++++++++-
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drivers/gpu/drm/vc4/vc4_hdmi.h | 1 +
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2 files changed, 26 insertions(+), 1 deletion(-)
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -243,6 +243,7 @@ vc4_hdmi_connector_duplicate_state(struc
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if (!new_state)
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return NULL;
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+ new_state->pixel_rate = vc4_state->pixel_rate;
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__drm_atomic_helper_connector_duplicate_state(connector, &new_state->base);
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return &new_state->base;
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@@ -669,9 +670,29 @@ static void vc4_hdmi_recenter_fifo(struc
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"VC4_HDMI_FIFO_CTL_RECENTER_DONE");
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}
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+static struct drm_connector_state *
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+vc4_hdmi_encoder_get_connector_state(struct drm_encoder *encoder,
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+ struct drm_atomic_state *state)
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+{
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+ struct drm_connector_state *conn_state;
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+ struct drm_connector *connector;
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+ unsigned int i;
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+
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+ for_each_new_connector_in_state(state, connector, conn_state, i) {
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+ if (conn_state->best_encoder == encoder)
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+ return conn_state;
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+ }
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+
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+ return NULL;
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+}
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+
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static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder,
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struct drm_atomic_state *state)
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{
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+ struct drm_connector_state *conn_state =
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+ vc4_hdmi_encoder_get_connector_state(encoder, state);
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+ struct vc4_hdmi_connector_state *vc4_conn_state =
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+ conn_state_to_vc4_hdmi_conn_state(conn_state);
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struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
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struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
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unsigned long pixel_rate, hsm_rate;
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@@ -683,7 +704,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
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return;
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}
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- pixel_rate = mode->clock * 1000 * ((mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1);
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+ pixel_rate = vc4_conn_state->pixel_rate;
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ret = clk_set_rate(vc4_hdmi->pixel_clock, pixel_rate);
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if (ret) {
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DRM_ERROR("Failed to set pixel clock rate: %d\n", ret);
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@@ -845,6 +866,7 @@ static int vc4_hdmi_encoder_atomic_check
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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+ struct vc4_hdmi_connector_state *vc4_state = conn_state_to_vc4_hdmi_conn_state(conn_state);
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struct drm_display_mode *mode = &crtc_state->adjusted_mode;
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struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
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unsigned long long pixel_rate = mode->clock * 1000;
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@@ -876,6 +898,8 @@ static int vc4_hdmi_encoder_atomic_check
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if (pixel_rate > vc4_hdmi->variant->max_pixel_clock)
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return -EINVAL;
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+ vc4_state->pixel_rate = pixel_rate;
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+
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return 0;
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}
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
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@@ -189,6 +189,7 @@ encoder_to_vc4_hdmi(struct drm_encoder *
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struct vc4_hdmi_connector_state {
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struct drm_connector_state base;
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+ unsigned long long pixel_rate;
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};
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static inline struct vc4_hdmi_connector_state *
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