mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 15:02:32 +00:00
d1016446da
The GL.iNet X3000 and XE3000 are Wi-Fi 6 5G cellular routers, based on MediaTek MT7981A SoC. The XE3000 is the same device as the X3000, except for an additional battery. Specifications: - SoC: Filogic 820 MT7981A (1.3GHz) - RAM: DDR4 512M - Flash: eMMC 8G, MicroSD card slot - WiFi: 2.4GHz and 5GHz with 6 antennas - Ethernet: - 1x LAN (10/100/1000M) - 1x WAN (10/100/1000/2500M) - 5G: Quectel RM520N-GL with two nano-SIM card slots - USB: 1x USB 2.0 port - UART: - 3.3V, TX, RX, GND / 115200 8N1 MAC addresses as verified by OEM firmware: vendor OpenWrt address source WAN eth0 label factory 0x0a (label) LAN eth1 label + 1 2g phy0-ap0 label + 2 factory 0x04 5g phy1-ap0 label + 3 Installation via U-Boot rescue: 1. Press and hold reset button while booting the device 2. Wait for the Internet led to blink 5 times 3. Release reset button 4. The rescue page is accessible via http://192.168.1.1 5. Select the OpenWrt sysupgrade image and start upgrade 6. Wait for the router to flash new firmware and reboot Revert to stock firmware: 1. Download the stock firmware from GL.iNet website 2. Use the method explained above to flash the stock firmware Switch the modem network port between PCIe and USB interfaces: 1. Connect to the AT commands (/dev/ttyUSB2) port using e.g. minicom: minicom -D /dev/ttyUSB2 2. Check the current modem mode with 'AT+QCFG="data_interface"': - 0,0 indicates that the network port uses the USB interface - 1,0 indicates that the network port uses the PCIe interface 3. Switch the active interface with: - 'AT+QCFG="data_interface",0,0' to use the USB interface - 'AT+QCFG="data_interface",1,0' to use the PCIe interface 4. Reboot Signed-off-by: Jean Thomas <jean.thomas@wifirst.fr>
24 lines
387 B
Plaintext
24 lines
387 B
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
#include "mt7981a-glinet-gl-x3000-xe3000-common.dtsi"
|
|
|
|
/ {
|
|
model = "GL.iNet GL-XE3000";
|
|
compatible = "glinet,gl-xe3000", "mediatek,mt7981";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart1_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pio {
|
|
uart1_pins: uart1-pins-g1 {
|
|
mux {
|
|
function = "uart";
|
|
groups = "uart1_3";
|
|
};
|
|
};
|
|
};
|