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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
123 lines
3.2 KiB
Diff
123 lines
3.2 KiB
Diff
From ff527efdd7a2d32b591f22178e9c4e221301efa2 Mon Sep 17 00:00:00 2001
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From: Jonathan Bell <jonathan@raspberrypi.com>
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Date: Tue, 5 Mar 2024 14:32:46 +0000
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Subject: [PATCH 0928/1085] DT: rp1: add general-purpose clock source
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definitions
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GPCLKs have two parts - a clock divider and a clock input, routed out to
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and in from a GPIO pad respectively. It follows that the clksrc_gpN
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inputs can't be used unless the pad is also configured as a GPCLK, so
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leave them disabled.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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---
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arch/arm/boot/dts/broadcom/rp1.dtsi | 90 +++++++++++++++++++++++++++++
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1 file changed, 90 insertions(+)
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--- a/arch/arm/boot/dts/broadcom/rp1.dtsi
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+++ b/arch/arm/boot/dts/broadcom/rp1.dtsi
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@@ -858,6 +858,36 @@
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bias-disable;
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};
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+ rp1_gpclksrc0_gpio4: rp1_gpclksrc0_gpio4 {
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+ function = "gpclk0";
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+ pins = "gpio4";
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+ bias-disable;
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+ };
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+
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+ rp1_gpclksrc0_gpio20: rp1_gpclksrc0_gpio20 {
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+ function = "gpclk0";
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+ pins = "gpio20";
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+ bias-disable;
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+ };
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+
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+ rp1_gpclksrc1_gpio5: rp1_gpclksrc1_gpio5 {
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+ function = "gpclk1";
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+ pins = "gpio5";
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+ bias-disable;
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+ };
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+
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+ rp1_gpclksrc1_gpio18: rp1_gpclksrc1_gpio18 {
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+ function = "gpclk1";
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+ pins = "gpio18";
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+ bias-disable;
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+ };
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+
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+ rp1_gpclksrc1_gpio21: rp1_gpclksrc1_gpio21 {
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+ function = "gpclk1";
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+ pins = "gpio21";
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+ bias-disable;
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+ };
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+
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rp1_pwm1_gpio45: rp1_pwm1_gpio45 {
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function = "pwm1";
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pins = "gpio45";
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@@ -1203,6 +1233,66 @@
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clock-output-names = "clksrc_mipi1_dsi_byteclk";
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clock-frequency = <72000000>;
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};
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+ /* GPIO derived clock sources. Each GPIO with a GPCLK function
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+ * can drive its output from the respective GPCLK
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+ * generator, and provide a clock source to other internal
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+ * dividers. Add dummy sources here so that they can be overridden
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+ * with overlays.
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+ */
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+ clksrc_gp0: clksrc_gp0 {
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+ status = "disabled";
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+ compatible = "fixed-factor-clock";
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+ #clock-cells = <0>;
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+ clock-div = <1>;
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+ clock-mult = <1>;
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+ clocks = <&rp1_clocks RP1_CLK_GP0>;
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+ clock-output-names = "clksrc_gp0";
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+ };
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+ clksrc_gp1: clksrc_gp1 {
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+ status = "disabled";
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+ compatible = "fixed-factor-clock";
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+ #clock-cells = <0>;
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+ clock-div = <1>;
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+ clock-mult = <1>;
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+ clocks = <&rp1_clocks RP1_CLK_GP1>;
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+ clock-output-names = "clksrc_gp1";
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+ };
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+ clksrc_gp2: clksrc_gp2 {
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+ status = "disabled";
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+ compatible = "fixed-factor-clock";
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+ clock-div = <1>;
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+ clock-mult = <1>;
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+ #clock-cells = <0>;
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+ clocks = <&rp1_clocks RP1_CLK_GP2>;
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+ clock-output-names = "clksrc_gp2";
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+ };
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+ clksrc_gp3: clksrc_gp3 {
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+ status = "disabled";
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+ compatible = "fixed-factor-clock";
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+ clock-div = <1>;
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+ clock-mult = <1>;
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+ #clock-cells = <0>;
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+ clocks = <&rp1_clocks RP1_CLK_GP3>;
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+ clock-output-names = "clksrc_gp3";
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+ };
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+ clksrc_gp4: clksrc_gp4 {
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+ status = "disabled";
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+ compatible = "fixed-factor-clock";
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+ #clock-cells = <0>;
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+ clock-div = <1>;
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+ clock-mult = <1>;
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+ clocks = <&rp1_clocks RP1_CLK_GP4>;
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+ clock-output-names = "clksrc_gp4";
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+ };
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+ clksrc_gp5: clksrc_gp5 {
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+ status = "disabled";
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+ compatible = "fixed-factor-clock";
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+ #clock-cells = <0>;
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+ clock-div = <1>;
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+ clock-mult = <1>;
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+ clocks = <&rp1_clocks RP1_CLK_GP5>;
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+ clock-output-names = "clksrc_gp5";
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+ };
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};
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/ {
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