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Qualcomm Atheros IPQ807x is a modern WiSoC featuring: * Quad Core ARMv8 Cortex A-53 * @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye * @ 1.4 GHz (IPQ8070A/1A) Codename Acorn * Dual Band simultaneaous IEEE 802.11ax * 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A) * 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A) * 5G: 2x2/80MHz (IPQ8070A) * 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A) * 2G: 2x2/40MHz (IPQ8070A/1A) * 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports) * 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye * 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn * DDR3L/4 32/16 bit up to 2400MT/s * SDIO 3.0/SD card 3.0/eMMC 5.1 * Dual USB 3.0 * One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane) * Parallel NAND (ONFI)/LCD * 6x QUP BLSP SPI/I2C/UART * I2S, PCM, and TDMA * HW PWM * 1.8V configurable GPIO * Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc) Note that only v2 SOC models aka the ones ending with A suffix are supported, v1 models do not comply to the final 802.11ax and have lower clocks, lack the Gen3 PCIe etc. SoC itself has two UBI32 cores for the NSS offloading system, however currently no offloading is supported. Signed-off-by: Robert Marko <robimarko@gmail.com>
53 lines
1.7 KiB
Diff
53 lines
1.7 KiB
Diff
From 0c309f4e86c827cd5fd2eb0e36d5d1f19927380d Mon Sep 17 00:00:00 2001
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From: Caleb Connolly <caleb.connolly@linaro.org>
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Date: Fri, 29 Apr 2022 23:08:58 +0100
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Subject: [PATCH] mfd: qcom-spmi-pmic: read fab id on supported PMICs
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The PMI8998 and PM660 expose the fab_id, this is needed by drivers like
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the RRADC to calibrate ADC values.
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Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Acked-by: Lee Jones <lee.jones@linaro.org>
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Link: https://lore.kernel.org/r/20220429220904.137297-4-caleb.connolly@linaro.org
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Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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---
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drivers/mfd/qcom-spmi-pmic.c | 7 +++++++
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include/soc/qcom/qcom-spmi-pmic.h | 1 +
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2 files changed, 8 insertions(+)
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--- a/drivers/mfd/qcom-spmi-pmic.c
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+++ b/drivers/mfd/qcom-spmi-pmic.c
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@@ -19,6 +19,7 @@
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#define PMIC_REV4 0x103
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#define PMIC_TYPE 0x104
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#define PMIC_SUBTYPE 0x105
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+#define PMIC_FAB_ID 0x1f2
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#define PMIC_TYPE_VALUE 0x51
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@@ -157,6 +158,12 @@ static int pmic_spmi_load_revid(struct r
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if (ret < 0)
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return ret;
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+ if (pmic->subtype == PMI8998_SUBTYPE || pmic->subtype == PM660_SUBTYPE) {
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+ ret = regmap_read(map, PMIC_FAB_ID, &pmic->fab_id);
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+ if (ret < 0)
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+ return ret;
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+ }
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+
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/*
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* In early versions of PM8941 and PM8226, the major revision number
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* started incrementing from 0 (eg 0 = v1.0, 1 = v2.0).
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--- a/include/soc/qcom/qcom-spmi-pmic.h
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+++ b/include/soc/qcom/qcom-spmi-pmic.h
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@@ -52,6 +52,7 @@ struct qcom_spmi_pmic {
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unsigned int major;
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unsigned int minor;
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unsigned int rev2;
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+ unsigned int fab_id;
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const char *name;
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};
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