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d65b1c815a
With kernel commit 7630ea4bda18 ("Documentation: net: phy: improve explanation when to specify the PHY ID") the purpose of using phy id specific compatibles was clarified. Remove the phy id specific compatibles since they are meant to be used if the phy reports an incorrect or no phy id at all. Reported-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Mathias Kresin <dev@kresin.me>
252 lines
4.9 KiB
Plaintext
252 lines
4.9 KiB
Plaintext
#include "vr9.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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bootargs = "console=ttyLTQ0,115200 mem=62M vpe1_load_addr=0x83e00000 vpe1_mem=2M maxvpes=1 maxtcs=1 nosmp";
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};
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aliases {
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led-boot = &power_green;
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led-failsafe = &power_red;
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led-running = &power_green;
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led-dsl = &dsl;
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led-internet = &internet_green;
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led-wifi = &wifi;
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};
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sram@1F000000 {
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vmmc@107000 {
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status = "okay";
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gpios = <&gpio 30 GPIO_ACTIVE_HIGH //fxs relay
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&gpio 31 GPIO_ACTIVE_HIGH //still unknown
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&gpio 3 GPIO_ACTIVE_HIGH>; //reset_slic?
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};
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};
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memory@0 {
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reg = <0x0 0x4000000>;
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};
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fpi@10000000 {
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localbus@0 {
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nor-boot@0 {
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compatible = "lantiq,nor";
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bank-width = <2>;
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reg = <0 0x0 0x1000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boardconfig: partition@fe0000 {
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label = "board_config";
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reg = <0xfe0000 0x20000>;
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read-only;
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};
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};
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};
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};
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gpio: pinmux@E100B10 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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gphy-leds {
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lantiq,groups = "gphy0 led0", "gphy0 led1",
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"gphy1 led0", "gphy1 led1";
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lantiq,function = "gphy";
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lantiq,open-drain = <0>;
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lantiq,pull = <2>;
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lantiq,output = <1>;
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};
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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pci-rst {
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lantiq,pins = "io21";
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lantiq,open-drain = <0>;
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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};
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};
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ifxhcd@E101000 {
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status = "okay";
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gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
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};
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pcie@d900000 {
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status = "disabled";
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};
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};
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gphy-xrx200 {
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compatible = "lantiq,phy-xrx200";
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firmware1 = "lantiq/vr9_phy22f_a1x.bin"; /*VR9 1.1*/
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firmware2 = "lantiq/vr9_phy22f_a2x.bin"; /*VR9 1.2*/
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phys = [ 00 01 ];
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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reset {
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label = "reset";
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gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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dsl: dsl {
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label = "vgv7510kw22:green:dsl";
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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};
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internet_red {
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label = "vgv7510kw22:red:internet";
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gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
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};
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info_red {
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label = "vgv7510kw22:red:info";
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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};
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power_green: power {
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label = "vgv7510kw22:green:power";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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default-state = "keep";
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};
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info_green {
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label = "vgv7510kw22:green:info";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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internet_green: internet_green {
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label = "vgv7510kw22:green:internet";
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gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
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};
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wifi: wifi {
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label = "vgv7510kw22:green:wlan";
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gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
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};
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power_red: power2 {
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label = "vgv7510kw22:red:power";
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gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
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};
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phone {
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label = "vgv7510kw22:green:telefon";
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gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&pci0 {
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status = "okay";
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gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
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wifi@1814,3592 {
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compatible = "pci1814,3592";
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reg = <0x7000 0 0 0 0>;
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ralink,mtd-eeprom = <&boardconfig 0x410>;
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ralink,mtd-eeprom-swap;
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mtd-mac-address = <&boardconfig 0x16>;
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mtd-mac-address-increment = <1>;
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};
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};
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ð0 {
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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mtd-mac-address = <&boardconfig 0x16>;
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lantiq,switch;
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "mii";
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phy-handle = <&phy1>;
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};
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "mii";
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phy-handle = <&phy11>;
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};
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ethernet@3 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <3>;
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phy-mode = "mii";
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phy-handle = <&phy12>;
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};
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ethernet@4 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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phy-mode = "mii";
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phy-handle = <&phy13>;
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};
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ethernet@5 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <5>;
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phy-mode = "mii";
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phy-handle = <&phy14>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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phy1: ethernet-phy@1 {
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reg = <0x1>;
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compatible = "ethernet-phy-ieee802.3-c22";
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};
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy12: ethernet-phy@12 {
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reg = <0x12>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy13: ethernet-phy@13 {
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reg = <0x13>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy14: ethernet-phy@14 {
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reg = <0x14>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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