openwrt/target/linux/ramips/dts/mt7621_cudy_wr1300-v1.dts
Filip Milivojevic 990419dac3 ramips: cudy wr1300v1 reduce SPI freq to 10000000
Reducing SPI flash frequency allows the build to boot on both old variants
with W25Q128 chip and new variants with XM25QH128C chip.

The old 80000000 value only boots on devices with the W25Q128 flash.

This is also the change Cudy themselves made in their openwrt builds and
their .dts file.

Removed m25p,fast-read as it is not needed with slower speeds.

Signed-off-by: Filip Milivojevic <zekica@gmail.com>
2023-01-14 19:25:06 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "cudy,wr1300-v1", "mediatek,mt7621-soc";
model = "Cudy WR1300 v1";
aliases {
led-boot = &led_sys;
led-failsafe = &led_sys;
led-running = &led_sys;
led-upgrade = &led_sys;
label-mac-device = &gmac0;
};
chosen {
bootargs = "console=ttyS0,115200";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_sys: sys {
label = "green:sys";
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
};
usb {
label = "green:usb";
gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
linux,default-trigger = "usbport";
};
wps {
label = "green:wps";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xf80000>;
};
partition@fd0000 {
label = "debug";
reg = <0xfd0000 0x10000>;
read-only;
};
partition@fe0000 {
label = "backup";
reg = <0xfe0000 0x10000>;
read-only;
};
bdinfo: partition@ff0000 {
label = "bdinfo";
reg = <0xff0000 0x10000>;
read-only;
};
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
nvmem-cells = <&macaddr_bdinfo_de00>;
nvmem-cell-names = "mac-address";
ieee80211-freq-limit = <2400000 2500000>;
led {
led-active-low;
};
};
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
nvmem-cells = <&macaddr_bdinfo_de00>;
nvmem-cell-names = "mac-address";
mac-address-increment = <2>;
ieee80211-freq-limit = <5000000 6000000>;
led {
led-sources = <2>;
led-active-low;
};
};
};
&gmac0 {
nvmem-cells = <&macaddr_bdinfo_de00>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&ethphy4>;
nvmem-cells = <&macaddr_bdinfo_de00>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
};
&mdio {
ethphy4: ethernet-phy@4 {
reg = <4>;
};
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan4";
};
port@1 {
status = "okay";
label = "lan3";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
};
};
&state_default {
gpio {
groups = "wdt", "i2c", "jtag";
function = "gpio";
};
};
&bdinfo {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_bdinfo_de00: macaddr@de00 {
reg = <0xde00 0x6>;
};
};