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Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its currently set to plain RGMII mode meaning that it doesn't introduce delays. With this setup, TX packets are completely lost and changing the mode to RGMII-ID so the PHY will add delays internally fixes the issue. It looks like this got broken in 5.10 as the PHY RGMII config got fixed due to datasheet being available and a lot of boards got broken by that. This has already been sent upstream and received multiple reviews. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
33 lines
1.2 KiB
Diff
33 lines
1.2 KiB
Diff
From 4f45f9f370a5bc6a43a7a166f10b3a30ca21353c Mon Sep 17 00:00:00 2001
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From: Robert Marko <robert.marko@sartura.hr>
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Date: Wed, 17 Nov 2021 10:36:31 +0100
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Subject: [PATCH v2] arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
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Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its
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currently set to plain RGMII mode meaning that it doesn't introduce
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delays.
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With this setup, TX packets are completely lost and changing the mode to
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RGMII-ID so the PHY will add delays internally fixes the issue.
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Fixes: a7affb13b271 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus")
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Tested-by: Ron Goossens <rgoossens@gmail.com>
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Signed-off-by: Robert Marko <robert.marko@sartura.hr>
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Tested-by: Samuel Holland <samuel@sholland.org>
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---
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arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
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@@ -69,7 +69,7 @@
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pinctrl-0 = <&emac_rgmii_pins>;
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phy-supply = <®_gmac_3v3>;
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phy-handle = <&ext_rgmii_phy>;
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- phy-mode = "rgmii";
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+ phy-mode = "rgmii-id";
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status = "okay";
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};
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