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f0c740650b
The following patches are dropped because they are now upstreamed:
- 0002-gpio-stp-xway-Implement-get-callback.patch
upstreamed with commit 5b9b2b5284f819 ("gpio: stp-xway: Implement get
callback")
- 0027-01-net-phy-intel-xway-add-VR9-version-number.patch
upstreamed with commit 5b73d9955fb4b0 ("net: phy: intel-xway: add VR9
version number")
- 0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch
upstreamed with commit f452518c982e57 ("net: phy: intel-xway: add VR9
v1.1 phy ids")
The following patches were updated:
- 0018-MTD-nand-lots-of-xrx200-fixes.patch
the mainline driver now resides in drivers/mtd/nand/raw/xway_nand.c
(instead of drivers/mtd/nand/xway_nand.c)
- 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
the DMA API now requires a valid device to be passed to all operations
- 0028-NET-lantiq-various-etop-fixes.patch
the DMA API now requires a valid device to be passed to all operations
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Mathias Kresin <dev@kresin.me>
79 lines
2.9 KiB
Diff
79 lines
2.9 KiB
Diff
From de2cad82c4d0872066f83ce59462603852b47f03 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Fri, 6 Jan 2017 17:55:24 +0100
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Subject: [PATCH 2/2] usb: dwc2: add support for other Lantiq SoCs
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The size of the internal RAM of the DesignWare USB controller changed
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between the different Lantiq SoCs. We have the following sizes:
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Amazon + Danube: 8 KByte
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Amazon SE + arx100: 2 KByte
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xrx200 + xrx300: 2.5 KByte
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For Danube SoC we do not provide the params and let the driver decide
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to use sane defaults, for the Amazon SE and arx100 we use small fifos
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and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo.
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The auto detection of max_transfer_size and max_packet_count should
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work, so remove it.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/usb/dwc2/platform.c | 46 ++++++++++++++++++++++++++++++++++++++-------
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1 file changed, 39 insertions(+), 7 deletions(-)
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--- a/drivers/usb/dwc2/params.c
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+++ b/drivers/usb/dwc2/params.c
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@@ -90,7 +90,14 @@ static void dwc2_set_rk_params(struct dw
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GAHBCFG_HBSTLEN_SHIFT;
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}
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-static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
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+static void dwc2_set_ltq_danube_params(struct dwc2_hsotg *hsotg)
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+{
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+ struct dwc2_core_params *p = &hsotg->params;
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+
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+ p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
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+}
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+
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+static void dwc2_set_ltq_ase_params(struct dwc2_hsotg *hsotg)
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{
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struct dwc2_core_params *p = &hsotg->params;
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@@ -98,12 +105,20 @@ static void dwc2_set_ltq_params(struct d
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p->host_rx_fifo_size = 288;
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p->host_nperio_tx_fifo_size = 128;
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p->host_perio_tx_fifo_size = 96;
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- p->max_transfer_size = 65535;
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- p->max_packet_count = 511;
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p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
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GAHBCFG_HBSTLEN_SHIFT;
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}
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+static void dwc2_set_ltq_xrx200_params(struct dwc2_hsotg *hsotg)
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+{
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+ struct dwc2_core_params *p = &hsotg->params;
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+
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+ p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
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+ p->host_rx_fifo_size = 288;
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+ p->host_nperio_tx_fifo_size = 128;
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+ p->host_perio_tx_fifo_size = 136;
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+}
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+
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static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg)
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{
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struct dwc2_core_params *p = &hsotg->params;
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@@ -155,8 +170,11 @@ const struct of_device_id dwc2_of_match_
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{ .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
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{ .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params },
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{ .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params },
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- { .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params },
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- { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params },
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+ { .compatible = "lantiq,danube-usb", .data = &dwc2_set_ltq_danube_params },
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+ { .compatible = "lantiq,ase-usb", .data = &dwc2_set_ltq_ase_params },
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+ { .compatible = "lantiq,arx100-usb", .data = &dwc2_set_ltq_ase_params },
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+ { .compatible = "lantiq,xrx200-usb", .data = &dwc2_set_ltq_xrx200_params },
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+ { .compatible = "lantiq,xrx300-usb", .data = &dwc2_set_ltq_xrx200_params },
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{ .compatible = "snps,dwc2" },
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{ .compatible = "samsung,s3c6400-hsotg",
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.data = dwc2_set_s3c6400_params },
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