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Refresh patches. Compile-tested for ar71xx - Archer C7 v2 Runtime-tested on ar71xx - Archer C7 v2 Fixes the following CVEs: - CVE-2017-7518 - CVE-2017-0786 - CVE-2017-1000255 - CVE-2017-12188 - CVE-2017-15265 Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
39 lines
972 B
Diff
39 lines
972 B
Diff
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -1533,7 +1533,10 @@ static void mtk_hwlro_rx_uninit(struct m
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for (i = 0; i < 10; i++) {
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val = mtk_r32(eth, MTK_PDMA_LRO_CTRL_DW0);
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if (val & MTK_LRO_RING_RELINQUISH_DONE) {
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- msleep(20);
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+ if (in_atomic())
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+ mdelay(20);
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+ else
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+ msleep(20);
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continue;
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}
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break;
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@@ -1951,7 +1954,10 @@ static void mtk_stop_dma(struct mtk_eth
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for (i = 0; i < 10; i++) {
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val = mtk_r32(eth, glo_cfg);
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if (val & (MTK_TX_DMA_BUSY | MTK_RX_DMA_BUSY)) {
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- msleep(20);
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+ if (in_atomic())
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+ mdelay(20);
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+ else
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+ msleep(20);
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continue;
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}
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break;
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@@ -1996,7 +2002,10 @@ static void ethsys_reset(struct mtk_eth
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reset_bits,
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reset_bits);
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- usleep_range(1000, 1100);
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+ if (in_atomic())
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+ udelay(1000);
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+ else
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+ usleep_range(1000, 1100);
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regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL,
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reset_bits,
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~reset_bits);
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