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ea42a04161
This is an RTL8393-based switch with 48 RJ-45 and 2 SFP ports. Hardware -------- SoC: Realtek RTL8393M RAM: 128MB DDR3 (Nanya NT5CC64M16GP-DI) FLASH: 8MB NOR (Macronix MX25L6433F) ETH: 48x 10/100/1000 Mbps RJ-45 Ethernet SFP: 2x SFP BTN: - 1x Reset button LEDS: - 50x Green-Amber leds: lan/sfp status - 1x Green led: power (Always on) UART: - 115200-8-N-1 (CN3, pin-out on PCB) Everything works correctly except for the 2 SFP ports that are not working unless you enable it every boot in U-Boot with the command: rtk network on Installation ------------ You can install Openwrt using one of the following methods. Warning: flashing OpenWrt will delete your current configuration. Warning 2: if the -factory.bix file is not available anymore, you must follow Method 2. Method 1: Check the firmware version currently running on your switch. If you are running FW V1.0.1.10 or greater, you have to download the firmware V1.0.1.8 from Netgear website and then flash this version. When the switch restarts, it should be on version V1.0.1.8. Now you can get the OpenWrt -factory.bix file and then flash it using the OEM web interface. Method 2 (requires the UART connection): Boot the -initramfs-kernel.bin image from U-Boot with these commands: rtk network on; tftpboot 0x8f000000 openwrt-realtek-rtl839x-netgear_gs750e-initramfs-kernel.bin; bootm; And then flash the -sysupgrade.bin file from OpenWrt. Revert to stock --------------- Get the stock firmware from the Netgear website and flash it using the OpenWrt web interface. Remember to not keep the current configuration and check the "Force upgrade" checkbox Once reverted to stock the firmware could complain in the UART console about mtdblock3 and/or mtdblock4 not being mounted correctly but it seems to work anyway without any problems. Sample error: mount: Mounting /dev/mtdblock4 on /mntlog failed: Input/output error If you want to get rid of these error messages you can boot the -initramfs-kernel.bin image from U-Boot with these commands: rtk network on; tftpboot 0x8f000000 openwrt-realtek-rtl839x-netgear_gs750e-initramfs-kernel.bin; bootm; And then erase the corresponding partitions using the command: For mtdblock3: mtd erase jffs2_cfg For mtdblock4: mtd erase jffs2_log Now you can reboot the switch and the errors should be gone Note ---- To get the SFP ports fully working, all the right GPIOs must be found. In the GPL sources I found these: - GPIO_14: SFP_TX_DIS1; - GPIO_19: SFP_TX_DIS0; Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
253 lines
4.7 KiB
Plaintext
253 lines
4.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl839x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "netgear,gs750e", "realtek,rtl8393-soc";
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model = "Netgear GS750E";
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aliases {
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label-mac-device = ðernet0;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio-restart {
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compatible = "gpio-restart";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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};
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virtual_flash {
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compatible = "mtd-concat";
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devices = <&fwconcat0>, <&fwconcat1>, <&fwconcat2>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "firmware";
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reg = <0x0 0x760000>;
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compatible = "openwrt,uimage", "denx,uimage";
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openwrt,ih-magic = <0x174e4741>;
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};
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "u-boot-env";
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reg = <0x80000 0x10000>;
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read-only;
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};
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partition@90000 {
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label = "u-boot-env2";
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reg = <0x90000 0x10000>;
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read-only;
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};
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fwconcat1: partition@a0000 {
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label = "jffs2_cfg";
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reg = <0xa0000 0x80000>;
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};
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fwconcat2: partition@120000 {
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label = "jffs2_log";
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reg = <0x120000 0x80000>;
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};
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fwconcat0: partition@1a0000 {
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label = "runtime";
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reg = <0x1a0000 0x660000>;
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};
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};
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};
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};
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ðernet0 {
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mdio: mdio-bus {
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compatible = "realtek,rtl838x-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
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/* External phy RTL8218B #1 */
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EXTERNAL_PHY(0)
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EXTERNAL_PHY(1)
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EXTERNAL_PHY(2)
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EXTERNAL_PHY(3)
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EXTERNAL_PHY(4)
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EXTERNAL_PHY(5)
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EXTERNAL_PHY(6)
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EXTERNAL_PHY(7)
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/* External phy RTL8218B #2 */
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EXTERNAL_PHY(8)
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EXTERNAL_PHY(9)
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EXTERNAL_PHY(10)
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EXTERNAL_PHY(11)
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EXTERNAL_PHY(12)
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EXTERNAL_PHY(13)
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EXTERNAL_PHY(14)
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EXTERNAL_PHY(15)
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/* External phy RTL8218B #3 */
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EXTERNAL_PHY(16)
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EXTERNAL_PHY(17)
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EXTERNAL_PHY(18)
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EXTERNAL_PHY(19)
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EXTERNAL_PHY(20)
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EXTERNAL_PHY(21)
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EXTERNAL_PHY(22)
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EXTERNAL_PHY(23)
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/* External phy RTL8218B #4 */
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EXTERNAL_PHY(24)
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EXTERNAL_PHY(25)
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EXTERNAL_PHY(26)
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EXTERNAL_PHY(27)
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EXTERNAL_PHY(28)
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EXTERNAL_PHY(29)
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EXTERNAL_PHY(30)
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EXTERNAL_PHY(31)
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/* External phy RTL8218B #5 */
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EXTERNAL_PHY(32)
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EXTERNAL_PHY(33)
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EXTERNAL_PHY(34)
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EXTERNAL_PHY(35)
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EXTERNAL_PHY(36)
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EXTERNAL_PHY(37)
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EXTERNAL_PHY(38)
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EXTERNAL_PHY(39)
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/* External phy RTL8218B #6 */
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EXTERNAL_PHY(40)
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EXTERNAL_PHY(41)
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EXTERNAL_PHY(42)
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EXTERNAL_PHY(43)
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EXTERNAL_PHY(44)
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EXTERNAL_PHY(45)
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EXTERNAL_PHY(46)
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EXTERNAL_PHY(47)
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/* RTL8393 Internal SerDes */
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INTERNAL_PHY(48)
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INTERNAL_PHY(49)
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};
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(0, 1, qsgmii)
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SWITCH_PORT(1, 2, qsgmii)
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SWITCH_PORT(2, 3, qsgmii)
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SWITCH_PORT(3, 4, qsgmii)
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SWITCH_PORT(4, 5, qsgmii)
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SWITCH_PORT(5, 6, qsgmii)
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SWITCH_PORT(6, 7, qsgmii)
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SWITCH_PORT(7, 8, qsgmii)
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SWITCH_PORT(8, 9, qsgmii)
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SWITCH_PORT(9, 0, qsgmii)
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SWITCH_PORT(10, 11, qsgmii)
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SWITCH_PORT(11, 12, qsgmii)
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SWITCH_PORT(12, 13, qsgmii)
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SWITCH_PORT(13, 14, qsgmii)
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SWITCH_PORT(14, 15, qsgmii)
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SWITCH_PORT(15, 16, qsgmii)
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SWITCH_PORT(16, 17, qsgmii)
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SWITCH_PORT(17, 18, qsgmii)
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SWITCH_PORT(18, 19, qsgmii)
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SWITCH_PORT(19, 20, qsgmii)
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SWITCH_PORT(20, 21, qsgmii)
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SWITCH_PORT(21, 22, qsgmii)
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SWITCH_PORT(22, 23, qsgmii)
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SWITCH_PORT(23, 24, qsgmii)
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SWITCH_PORT(24, 25, qsgmii)
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SWITCH_PORT(25, 26, qsgmii)
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SWITCH_PORT(26, 27, qsgmii)
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SWITCH_PORT(27, 28, qsgmii)
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SWITCH_PORT(28, 29, qsgmii)
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SWITCH_PORT(29, 30, qsgmii)
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SWITCH_PORT(30, 31, qsgmii)
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SWITCH_PORT(31, 32, qsgmii)
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SWITCH_PORT(32, 33, qsgmii)
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SWITCH_PORT(33, 34, qsgmii)
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SWITCH_PORT(34, 35, qsgmii)
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SWITCH_PORT(35, 36, qsgmii)
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SWITCH_PORT(36, 37, qsgmii)
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SWITCH_PORT(37, 38, qsgmii)
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SWITCH_PORT(38, 39, qsgmii)
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SWITCH_PORT(39, 40, qsgmii)
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SWITCH_PORT(40, 41, qsgmii)
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SWITCH_PORT(41, 42, qsgmii)
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SWITCH_PORT(42, 43, qsgmii)
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SWITCH_PORT(43, 44, qsgmii)
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SWITCH_PORT(44, 45, qsgmii)
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SWITCH_PORT(45, 46, qsgmii)
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SWITCH_PORT(46, 47, qsgmii)
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SWITCH_PORT(47, 48, qsgmii)
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/* SFP cages */
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SWITCH_SFP_PORT(48, 49, sgmii)
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SWITCH_SFP_PORT(49, 50, sgmii)
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/* CPU-Port */
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port@52 {
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ethernet = <ðernet0>;
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reg = <52>;
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phy-mode = "qsgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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