mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 14:13:16 +00:00
f19e471f32
Refreshed all patches. Altered patches: - 950-0064-mfd-Add-Raspberry-Pi-Sense-HAT-core-driver.patch - 0005-mtd-physmap_of-Move-custom-initialization.patch Remove upstreamed: - 0001-pinctrl-gemini-Mask-and-set-properly.patch - 0002-pinctrl-gemini-Fix-up-TVC-clock-group.patch Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
226 lines
7.8 KiB
Diff
226 lines
7.8 KiB
Diff
--- a/arch/arm/kernel/atags.h
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+++ b/arch/arm/kernel/atags.h
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@@ -5,7 +5,7 @@ void convert_to_tag_list(struct tag *tag
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const struct machine_desc *setup_machine_tags(phys_addr_t __atags_pointer,
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unsigned int machine_nr);
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#else
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-static inline const struct machine_desc *
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+static inline const struct machine_desc * __init __noreturn
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setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
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{
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early_print("no ATAGS support: can't continue\n");
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--- a/arch/arm64/include/asm/cpufeature.h
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+++ b/arch/arm64/include/asm/cpufeature.h
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@@ -366,7 +366,7 @@ static inline bool cpu_have_feature(unsi
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}
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/* System capability check for constant caps */
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-static inline bool __cpus_have_const_cap(int num)
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+static __always_inline bool __cpus_have_const_cap(int num)
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{
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if (num >= ARM64_NCAPS)
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return false;
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@@ -380,7 +380,7 @@ static inline bool cpus_have_cap(unsigne
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return test_bit(num, cpu_hwcaps);
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}
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-static inline bool cpus_have_const_cap(int num)
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+static __always_inline bool cpus_have_const_cap(int num)
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{
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if (static_branch_likely(&arm64_const_caps_ready))
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return __cpus_have_const_cap(num);
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--- a/arch/mips/include/asm/bitops.h
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+++ b/arch/mips/include/asm/bitops.h
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@@ -463,7 +463,7 @@ static inline void __clear_bit_unlock(un
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* Return the bit position (0..63) of the most significant 1 bit in a word
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* Returns -1 if no 1 bit exists
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*/
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-static inline unsigned long __fls(unsigned long word)
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+static __always_inline unsigned long __fls(unsigned long word)
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{
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int num;
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@@ -529,7 +529,7 @@ static inline unsigned long __fls(unsign
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* Returns 0..SZLONG-1
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* Undefined if no bit exists, so code should check against 0 first.
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*/
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-static inline unsigned long __ffs(unsigned long word)
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+static __always_inline unsigned long __ffs(unsigned long word)
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{
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return __fls(word & -word);
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}
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--- a/arch/mips/kernel/cpu-bugs64.c
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+++ b/arch/mips/kernel/cpu-bugs64.c
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@@ -42,8 +42,8 @@ static inline void align_mod(const int a
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: GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod));
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}
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-static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
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- const int align, const int mod)
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+static __always_inline void mult_sh_align_mod(long *v1, long *v2, long *w,
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+ const int align, const int mod)
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{
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unsigned long flags;
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int m1, m2;
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--- a/arch/powerpc/kernel/prom_init.c
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+++ b/arch/powerpc/kernel/prom_init.c
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@@ -498,14 +498,14 @@ static int __init prom_next_node(phandle
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}
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}
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-static inline int prom_getprop(phandle node, const char *pname,
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- void *value, size_t valuelen)
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+static inline int __init prom_getprop(phandle node, const char *pname,
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+ void *value, size_t valuelen)
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{
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return call_prom("getprop", 4, 1, node, ADDR(pname),
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(u32)(unsigned long) value, (u32) valuelen);
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}
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-static inline int prom_getproplen(phandle node, const char *pname)
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+static inline int __init prom_getproplen(phandle node, const char *pname)
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{
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return call_prom("getproplen", 2, 1, node, ADDR(pname));
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}
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--- a/arch/powerpc/mm/tlb-radix.c
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+++ b/arch/powerpc/mm/tlb-radix.c
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@@ -90,8 +90,8 @@ void radix__tlbiel_all(unsigned int acti
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asm volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory");
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}
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-static inline void __tlbiel_pid(unsigned long pid, int set,
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- unsigned long ric)
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+static __always_inline void __tlbiel_pid(unsigned long pid, int set,
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+ unsigned long ric)
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{
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unsigned long rb,rs,prs,r;
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@@ -106,7 +106,7 @@ static inline void __tlbiel_pid(unsigned
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trace_tlbie(0, 1, rb, rs, ric, prs, r);
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}
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-static inline void __tlbie_pid(unsigned long pid, unsigned long ric)
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+static __always_inline void __tlbie_pid(unsigned long pid, unsigned long ric)
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{
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unsigned long rb,rs,prs,r;
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@@ -136,7 +136,7 @@ static inline void __tlbiel_lpid(unsigne
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trace_tlbie(lpid, 1, rb, rs, ric, prs, r);
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}
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-static inline void __tlbie_lpid(unsigned long lpid, unsigned long ric)
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+static __always_inline void __tlbie_lpid(unsigned long lpid, unsigned long ric)
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{
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unsigned long rb,rs,prs,r;
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@@ -300,7 +300,7 @@ static inline void fixup_tlbie_lpid(unsi
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/*
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* We use 128 set in radix mode and 256 set in hpt mode.
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*/
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-static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
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+static __always_inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
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{
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int set;
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@@ -983,7 +983,7 @@ void radix__tlb_flush(struct mmu_gather
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tlb->need_flush_all = 0;
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}
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-static inline void __radix__flush_tlb_range_psize(struct mm_struct *mm,
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+static __always_inline void __radix__flush_tlb_range_psize(struct mm_struct *mm,
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unsigned long start, unsigned long end,
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int psize, bool also_pwc)
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{
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--- a/arch/s390/include/asm/cpacf.h
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+++ b/arch/s390/include/asm/cpacf.h
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@@ -202,7 +202,7 @@ static inline int __cpacf_check_opcode(u
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}
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}
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-static inline int cpacf_query(unsigned int opcode, cpacf_mask_t *mask)
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+static __always_inline int cpacf_query(unsigned int opcode, cpacf_mask_t *mask)
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{
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if (__cpacf_check_opcode(opcode)) {
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__cpacf_query(opcode, mask);
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--- a/arch/x86/Kconfig.debug
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+++ b/arch/x86/Kconfig.debug
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@@ -276,20 +276,6 @@ config CPA_DEBUG
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---help---
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Do change_page_attr() self-tests every 30 seconds.
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-config OPTIMIZE_INLINING
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- bool "Allow gcc to uninline functions marked 'inline'"
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- ---help---
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- This option determines if the kernel forces gcc to inline the functions
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- developers have marked 'inline'. Doing so takes away freedom from gcc to
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- do what it thinks is best, which is desirable for the gcc 3.x series of
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- compilers. The gcc 4.x series have a rewritten inlining algorithm and
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- enabling this option will generate a smaller kernel there. Hopefully
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- this algorithm is so good that allowing gcc 4.x and above to make the
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- decision will become the default in the future. Until then this option
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- is there to test gcc for this.
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-
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- If unsure, say N.
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-
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config DEBUG_ENTRY
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bool "Debug low-level entry code"
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depends on DEBUG_KERNEL
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--- a/drivers/mtd/nand/raw/vf610_nfc.c
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+++ b/drivers/mtd/nand/raw/vf610_nfc.c
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@@ -373,7 +373,7 @@ static int vf610_nfc_cmd(struct nand_chi
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{
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const struct nand_op_instr *instr;
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struct vf610_nfc *nfc = chip_to_nfc(chip);
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- int op_id = -1, trfr_sz = 0, offset;
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+ int op_id = -1, trfr_sz = 0, offset = 0;
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u32 col = 0, row = 0, cmd1 = 0, cmd2 = 0, code = 0;
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bool force8bit = false;
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--- a/lib/Kconfig.debug
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+++ b/lib/Kconfig.debug
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@@ -309,6 +309,20 @@ config HEADERS_CHECK
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exported to $(INSTALL_HDR_PATH) (usually 'usr/include' in
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your build tree), to make sure they're suitable.
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+config OPTIMIZE_INLINING
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+ bool "Allow compiler to uninline functions marked 'inline'"
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+ help
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+ This option determines if the kernel forces gcc to inline the functions
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+ developers have marked 'inline'. Doing so takes away freedom from gcc to
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+ do what it thinks is best, which is desirable for the gcc 3.x series of
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+ compilers. The gcc 4.x series have a rewritten inlining algorithm and
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+ enabling this option will generate a smaller kernel there. Hopefully
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+ this algorithm is so good that allowing gcc 4.x and above to make the
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+ decision will become the default in the future. Until then this option
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+ is there to test gcc for this.
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+
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+ If unsure, say N.
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+
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config DEBUG_SECTION_MISMATCH
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bool "Enable full Section mismatch analysis"
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help
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--- a/arch/x86/Kconfig
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+++ b/arch/x86/Kconfig
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@@ -306,9 +306,6 @@ config ZONE_DMA32
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config AUDIT_ARCH
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def_bool y if X86_64
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-config ARCH_SUPPORTS_OPTIMIZED_INLINING
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- def_bool y
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-
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config ARCH_SUPPORTS_DEBUG_PAGEALLOC
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def_bool y
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--- a/include/linux/compiler_types.h
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+++ b/include/linux/compiler_types.h
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@@ -268,8 +268,7 @@ struct ftrace_likely_data {
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* of extern inline functions at link time.
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* A lot of inline functions can cause havoc with function tracing.
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*/
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-#if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \
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- !defined(CONFIG_OPTIMIZE_INLINING)
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+#if !defined(CONFIG_OPTIMIZE_INLINING)
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#define inline \
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inline __attribute__((always_inline, unused)) notrace __gnu_inline
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#else
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