mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-29 18:19:02 +00:00
da42c329c6
This patch converts legacy Ralink SoCs and MT7620 WiFi calibration data to NVMEM format. The EEPROM size is 0x200. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
144 lines
2.2 KiB
Plaintext
144 lines
2.2 KiB
Plaintext
#include "mt7620a.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "planex,mzk-750dhp", "ralink,mt7620a-soc";
|
|
model = "Planex MZK-750DHP";
|
|
|
|
aliases {
|
|
led-boot = &led_power;
|
|
led-failsafe = &led_power;
|
|
led-running = &led_power;
|
|
led-upgrade = &led_power;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
wps {
|
|
label = "green:wps";
|
|
gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led_power: power {
|
|
label = "green:power";
|
|
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan5g {
|
|
label = "green:wlan5g";
|
|
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
s1 {
|
|
label = "reset";
|
|
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
s2 {
|
|
label = "wps";
|
|
gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gpio1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <10000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "u-boot-env";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
compatible = "nvmem-cells";
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
read-only;
|
|
|
|
eeprom_factory_0: eeprom@0 {
|
|
reg = <0x0 0x200>;
|
|
};
|
|
|
|
macaddr_factory_4: macaddr@4 {
|
|
reg = <0x4 0x6>;
|
|
};
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x50000 0x7b0000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "i2c", "spi refclk", "rgmii1", "nd_sd";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ephy_pins>;
|
|
|
|
nvmem-cells = <&macaddr_factory_4>;
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
mediatek,portmap = "llllw";
|
|
};
|
|
|
|
&wmac {
|
|
nvmem-cells = <&eeprom_factory_0>;
|
|
nvmem-cell-names = "eeprom";
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
mt76@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x8000>;
|
|
};
|
|
};
|