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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
47 lines
1.1 KiB
Diff
47 lines
1.1 KiB
Diff
From 031deed1d755fc9f1e4908ef70969e1458203421 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 6 Jun 2021 10:20:38 -0500
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Subject: [PATCH 049/117] dt-bindings: iommu: sun50i: Add compatible for
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Allwinner D1
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D1 contains an IOMMU similar to the one in the H6 SoC, but the D1
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variant has no external reset signal.
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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.../iommu/allwinner,sun50i-h6-iommu.yaml | 16 ++++++++++++++--
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1 file changed, 14 insertions(+), 2 deletions(-)
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--- a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml
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+++ b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml
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@@ -17,7 +17,9 @@ properties:
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The content of the cell is the master ID.
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compatible:
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- const: allwinner,sun50i-h6-iommu
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+ enum:
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+ - allwinner,sun20i-d1-iommu
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+ - allwinner,sun50i-h6-iommu
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reg:
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maxItems: 1
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@@ -37,7 +39,17 @@ required:
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- reg
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- interrupts
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- clocks
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- - resets
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+
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+if:
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+ properties:
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+ compatible:
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+ contains:
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+ enum:
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+ - allwinner,sun50i-h6-iommu
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+
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+then:
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+ required:
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+ - resets
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additionalProperties: false
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