openwrt/target/linux/ath79/dts/qca9556_avm_fritz1750e.dts
Shiji Yang d07cec6b2b
ath79: convert ath10k calibration data to NVMEM (built-in MAC)
This patch converts ath10k calibration data to NVMEM format for
wave 1 devices with built-in MAC address. The "calibration"
NVMEM cell size is 0x844.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2024-02-01 17:09:02 +01:00

120 lines
2.0 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca9556_avm_fritz-repeater.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "avm,fritz1750e", "qca,qca9556";
model = "AVM FRITZ!WLAN Repeater 1750E";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
num-chipselects = <0>;
spi_gpio: led_gpio@0 {
compatible = "fairchild,74hc595";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <1>;
spi-max-frequency = <10000000>;
gpio_latch_bit {
gpio-hog;
gpios = <7 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "gpio-latch-bit";
};
};
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "green:power";
gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
};
wlan {
label = "green:wlan";
gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy1tpt";
};
lan {
label = "green:lan";
gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
};
rssi0 {
label = "green:rssi0";
gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
};
rssi1 {
label = "green:rssi1";
gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
};
rssi2 {
label = "green:rssi2";
gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
};
rssi3 {
label = "green:rssi3";
gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
};
rssi4 {
label = "green:rssi4";
gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
};
};
};
&pcie0 {
status = "okay";
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_urlader_198a>;
nvmem-cell-names = "calibration";
};
};
&phy0 {
reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
&gpio {
reset-pcie-ep {
gpio-hog;
gpios = <17 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PCIE EP reset";
};
reset-pcie {
gpio-hog;
gpios = <18 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PCIE Bus reset";
};
};