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a5a3b59bf5
Disable marvell,nand-keep-config property on WRT1900AC to allow the flash driver to properly probe the chip Signed-off-by: Felix Fietkau <nbd@nbd.name>
43 lines
1.6 KiB
Diff
43 lines
1.6 KiB
Diff
From: =?UTF-8?q?Ezequiel=20Garc=C3=ADa?= <ezequiel@vanguardiasur.com.ar>
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Date: Wed, 4 Nov 2015 13:13:41 -0300
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Subject: [PATCH] mtd: pxa3xx_nand: Increase the initial chunk size
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The chunk size represents the size of the data chunks, which
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is used by the controllers that allow to split transfered data.
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However, the initial chunk size is used in a non-splitted way,
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during device identification. Therefore, it must be large enough
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for all the NAND commands issued during device identification.
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This includes NAND_CMD_PARAM which was recently changed to
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transfer up to 2048 bytes (for the redundant parameter pages).
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Thus, the initial chunk size should be 2048 as well.
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On Armada 370/XP platforms (NFCv2) booted without the keep-config
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devicetree property, this commit fixes a timeout on the NAND_CMD_PARAM
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command:
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[..]
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pxa3xx-nand f10d0000.nand: This platform can't do DMA on this device
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pxa3xx-nand f10d0000.nand: Wait time out!!!
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nand: device found, Manufacturer ID: 0x2c, Chip ID: 0x38
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nand: Micron MT29F8G08ABABAWP
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nand: 1024 MiB, SLC, erase size: 512 KiB, page size: 4096, OOB size: 224
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Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
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Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
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Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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---
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--- a/drivers/mtd/nand/pxa3xx_nand.c
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+++ b/drivers/mtd/nand/pxa3xx_nand.c
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@@ -1636,7 +1636,7 @@ static int pxa3xx_nand_scan(struct mtd_i
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goto KEEP_CONFIG;
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/* Set a default chunk size */
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- info->chunk_size = 512;
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+ info->chunk_size = PAGE_CHUNK_SIZE;
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ret = pxa3xx_nand_config_flash(info);
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if (ret)
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