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e8068f0b1b
Add the required nodes for the interrupt controllers and register them through DT when a DTB is present. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 43457
63 lines
1.2 KiB
Plaintext
63 lines
1.2 KiB
Plaintext
/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm63268";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "brcm,bmips4350", "mips,mips4Kc";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "brcm,bmips4350", "mips,mips4Kc";
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device_type = "cpu";
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reg = <1>;
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};
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};
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cpu_intc: interrupt-controller {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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memory { device_type = "memory"; reg = <0 0>; };
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ubus@10000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "simple-bus";
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ext_intc: interrupt-controller@10000018 {
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compatible = "brcm,bcm6345-ext-intc";
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reg = <0x10000018 0x4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&periph_intc>;
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interrupts = <44>, <45>, <46>, <47>;
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};
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periph_intc: interrupt-controller@10000020 {
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compatible = "brcm,bcm6345-l2-intc";
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reg = <0x10000020 0x20>,
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<0x10000040 0x20>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>, <3>;
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};
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};
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};
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