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66f8f30f47
Update patches with their upstream versions. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 37098
74 lines
2.6 KiB
Diff
74 lines
2.6 KiB
Diff
From b6b668f780d62d41bc14bc7baba1692e17cabf84 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Fri, 26 Apr 2013 11:21:16 +0200
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Subject: [PATCH 10/14] MIPS: BCM63XX: add cpu argument to dispatch internal
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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arch/mips/bcm63xx/irq.c | 21 +++++++++++----------
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1 file changed, 11 insertions(+), 10 deletions(-)
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--- a/arch/mips/bcm63xx/irq.c
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+++ b/arch/mips/bcm63xx/irq.c
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@@ -19,8 +19,8 @@
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#include <bcm63xx_io.h>
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#include <bcm63xx_irq.h>
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-static void __dispatch_internal_32(void) __maybe_unused;
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-static void __dispatch_internal_64(void) __maybe_unused;
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+static void __dispatch_internal_32(int cpu) __maybe_unused;
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+static void __dispatch_internal_64(int cpu) __maybe_unused;
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static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
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static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
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static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
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@@ -158,7 +158,7 @@ static inline void bcm63xx_init_irq(void
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#else /* ! BCMCPU_RUNTIME_DETECT */
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static u32 irq_stat_addr0, irq_mask_addr0, irq_stat_addr1, irq_mask_addr1;
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-static void (*dispatch_internal)(void);
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+static void (*dispatch_internal)(int cpu);
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static int is_ext_irq_cascaded;
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static unsigned int ext_irq_count;
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static unsigned int ext_irq_start, ext_irq_end;
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@@ -315,14 +315,15 @@ static inline void handle_internal(int i
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*/
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#define BUILD_IPIC_INTERNAL(width) \
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-void __dispatch_internal_##width(void) \
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+void __dispatch_internal_##width(int cpu) \
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{ \
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u32 pending[width / 32]; \
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unsigned int src, tgt; \
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bool irqs_pending = false; \
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- static int i; \
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- u32 irq_stat_addr = get_irq_stat_addr(0); \
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- u32 irq_mask_addr = get_irq_mask_addr(0); \
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+ static int i[NR_CPUS]; \
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+ u32 irq_stat_addr = get_irq_stat_addr(cpu); \
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+ u32 irq_mask_addr = get_irq_mask_addr(cpu); \
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+ int *next = &i[cpu]; \
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\
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/* read registers in reverse order */ \
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for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
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@@ -340,9 +341,9 @@ void __dispatch_internal_##width(void)
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return; \
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\
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while (1) { \
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- int to_call = i; \
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+ int to_call = *next; \
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\
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- i = (i + 1) & (width - 1); \
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+ *next = (*next + 1) & (width - 1); \
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if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
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handle_internal(to_call); \
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break; \
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@@ -394,7 +395,7 @@ asmlinkage void plat_irq_dispatch(void)
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if (cause & CAUSEF_IP1)
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do_IRQ(1);
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if (cause & CAUSEF_IP2)
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- dispatch_internal();
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+ dispatch_internal(0);
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if (!is_ext_irq_cascaded) {
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if (cause & CAUSEF_IP3)
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do_IRQ(IRQ_EXT_0);
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