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This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.11, and Linux v3.12. This work mainly covers: * Ground work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family,and the Armada family. * Further updates to the mvebu MBus. * Work and ground work for enabling MSI on the Armada family. * some phy / mdio bus initialization related work. * Device tree binding documentation update. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39565
168 lines
5.2 KiB
Diff
168 lines
5.2 KiB
Diff
From 8298866bfa7fe9c1e33055322c415f612c16a477 Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Tue, 28 May 2013 08:56:04 -0300
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Subject: [PATCH 056/203] ARM: mvebu: Add MBus to Armada 370/XP device tree
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The Armada 370/XP SoC family has a completely configurable address
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space handled by the MBus controller.
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This patch introduces the device tree layout of MBus, making the
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'soc' node as mbus-compatible.
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Since every peripheral/controller is a child of this 'soc' node,
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this makes all of them sit behind the mbus, thus describing the
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hardware accurately.
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A translation entry has been added for the internal-regs mapping.
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This can't be done in the common armada-370-xp.dtsi because A370
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and AXP have different addressing width.
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Tested-by: Andrew Lunn <andrew@lunn.ch>
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Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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---
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arch/arm/boot/dts/armada-370-db.dts | 2 ++
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arch/arm/boot/dts/armada-370-mirabox.dts | 2 ++
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arch/arm/boot/dts/armada-370-rd.dts | 2 ++
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arch/arm/boot/dts/armada-370-xp.dtsi | 15 ++++++++++-----
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arch/arm/boot/dts/armada-370.dtsi | 4 ++--
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arch/arm/boot/dts/armada-xp-db.dts | 4 +---
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arch/arm/boot/dts/armada-xp-gp.dts | 4 +---
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arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 4 +---
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arch/arm/boot/dts/armada-xp.dtsi | 2 ++
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9 files changed, 23 insertions(+), 16 deletions(-)
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--- a/arch/arm/boot/dts/armada-370-db.dts
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+++ b/arch/arm/boot/dts/armada-370-db.dts
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@@ -30,6 +30,8 @@
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};
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soc {
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;
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+
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internal-regs {
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serial@12000 {
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clock-frequency = <200000000>;
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--- a/arch/arm/boot/dts/armada-370-mirabox.dts
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+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
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@@ -25,6 +25,8 @@
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};
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soc {
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;
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+
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internal-regs {
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serial@12000 {
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clock-frequency = <200000000>;
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--- a/arch/arm/boot/dts/armada-370-rd.dts
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+++ b/arch/arm/boot/dts/armada-370-rd.dts
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@@ -28,6 +28,8 @@
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};
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soc {
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;
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+
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internal-regs {
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serial@12000 {
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clock-frequency = <200000000>;
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--- a/arch/arm/boot/dts/armada-370-xp.dtsi
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+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
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@@ -18,6 +18,8 @@
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/include/ "skeleton64.dtsi"
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+#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
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+
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/ {
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model = "Marvell Armada 370 and XP SoC";
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compatible = "marvell,armada-370-xp";
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@@ -29,18 +31,21 @@
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};
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soc {
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- #address-cells = <1>;
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+ #address-cells = <2>;
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#size-cells = <1>;
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- compatible = "simple-bus";
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+ controller = <&mbusc>;
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interrupt-parent = <&mpic>;
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- ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
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- 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
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internal-regs {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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- ranges;
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+ ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
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+
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+ mbusc: mbus-controller@20000 {
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+ compatible = "marvell,mbus-controller";
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+ reg = <0x20000 0x100>, <0x20180 0x20>;
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+ };
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mpic: interrupt-controller@20000 {
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compatible = "marvell,mpic";
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--- a/arch/arm/boot/dts/armada-370.dtsi
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+++ b/arch/arm/boot/dts/armada-370.dtsi
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@@ -29,8 +29,8 @@
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};
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soc {
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- ranges = <0 0xd0000000 0x0100000 /* internal registers */
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- 0xe0000000 0xe0000000 0x8100000 /* PCIe */>;
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+ compatible = "marvell,armada370-mbus", "simple-bus";
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+
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internal-regs {
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system-controller@18200 {
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compatible = "marvell,armada-370-xp-system-controller";
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--- a/arch/arm/boot/dts/armada-xp-db.dts
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+++ b/arch/arm/boot/dts/armada-xp-db.dts
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@@ -30,9 +30,7 @@
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};
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soc {
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- ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
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- 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
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- 0xf0000000 0 0xf0000000 0x1000000>; /* Device Bus, NOR 16MiB */
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000>;
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internal-regs {
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serial@12000 {
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--- a/arch/arm/boot/dts/armada-xp-gp.dts
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+++ b/arch/arm/boot/dts/armada-xp-gp.dts
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@@ -39,9 +39,7 @@
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};
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soc {
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- ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
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- 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
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- 0xf0000000 0 0xf0000000 0x1000000 /* Device Bus, NOR 16MiB */>;
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000>;
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internal-regs {
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serial@12000 {
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--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
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+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
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@@ -27,9 +27,7 @@
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};
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soc {
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- ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
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- 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
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- 0xf0000000 0 0xf0000000 0x8000000 /* Device Bus, NOR 128MiB */>;
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+ ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000>;
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internal-regs {
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serial@12000 {
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--- a/arch/arm/boot/dts/armada-xp.dtsi
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+++ b/arch/arm/boot/dts/armada-xp.dtsi
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@@ -23,6 +23,8 @@
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compatible = "marvell,armadaxp", "marvell,armada-370-xp";
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soc {
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+ compatible = "marvell,armadaxp-mbus", "simple-bus";
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+
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internal-regs {
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L2: l2-cache {
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compatible = "marvell,aurora-system-cache";
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