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14940aee45
Removed upstreamed: target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch The following patch does not apply to upstream any more and needs some more work to make it work fully again. I am not sure if we are still able to set the UART to a none standard baud rate. target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch These patches needed manually changes: target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch All others updated automatically. Compile-tested on: malta/le, armvirt/64, lantiq/xrx200 Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
110 lines
3.2 KiB
Diff
110 lines
3.2 KiB
Diff
From c96a1cff5d03a56f380ce761aec9d11fcf61c7f1 Mon Sep 17 00:00:00 2001
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From: Vladimir Oltean <vladimir.oltean@nxp.com>
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Date: Thu, 14 Nov 2019 17:03:26 +0200
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Subject: [PATCH] net: mscc: ocelot: separate the implementation of switch
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reset
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The Felix switch has a different reset procedure, so a function pointer
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needs to be created and added to the ocelot_ops structure.
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The reset procedure has been moved into ocelot_init.
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Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/mscc/ocelot.c | 8 +++++++
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drivers/net/ethernet/mscc/ocelot.h | 1 +
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drivers/net/ethernet/mscc/ocelot_board.c | 37 +++++++++++++++++++++-----------
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3 files changed, 33 insertions(+), 13 deletions(-)
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--- a/drivers/net/ethernet/mscc/ocelot.c
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+++ b/drivers/net/ethernet/mscc/ocelot.c
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@@ -2268,6 +2268,14 @@ int ocelot_init(struct ocelot *ocelot)
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int i, ret;
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u32 port;
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+ if (ocelot->ops->reset) {
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+ ret = ocelot->ops->reset(ocelot);
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+ if (ret) {
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+ dev_err(ocelot->dev, "Switch reset failed\n");
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+ return ret;
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+ }
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+ }
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+
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ocelot->lags = devm_kcalloc(ocelot->dev, ocelot->num_phys_ports,
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sizeof(u32), GFP_KERNEL);
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if (!ocelot->lags)
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--- a/drivers/net/ethernet/mscc/ocelot.h
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+++ b/drivers/net/ethernet/mscc/ocelot.h
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@@ -446,6 +446,7 @@ struct ocelot_stat_layout {
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struct ocelot_ops {
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void (*pcs_init)(struct ocelot *ocelot, int port);
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+ int (*reset)(struct ocelot *ocelot);
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};
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struct ocelot {
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--- a/drivers/net/ethernet/mscc/ocelot_board.c
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+++ b/drivers/net/ethernet/mscc/ocelot_board.c
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@@ -285,8 +285,32 @@ static void ocelot_port_pcs_init(struct
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ocelot_port_writel(ocelot_port, 0, PCS1G_LB_CFG);
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}
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+static int ocelot_reset(struct ocelot *ocelot)
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+{
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+ int retries = 100;
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+ u32 val;
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+
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+ regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_INIT], 1);
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+ regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
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+
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+ do {
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+ msleep(1);
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+ regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT],
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+ &val);
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+ } while (val && --retries);
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+
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+ if (!retries)
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+ return -ETIMEDOUT;
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+
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+ regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
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+ regmap_field_write(ocelot->regfields[SYS_RESET_CFG_CORE_ENA], 1);
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+
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+ return 0;
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+}
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+
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static const struct ocelot_ops ocelot_ops = {
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.pcs_init = ocelot_port_pcs_init,
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+ .reset = ocelot_reset,
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};
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static int mscc_ocelot_probe(struct platform_device *pdev)
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@@ -297,7 +321,6 @@ static int mscc_ocelot_probe(struct plat
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struct ocelot *ocelot;
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struct regmap *hsio;
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unsigned int i;
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- u32 val;
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struct {
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enum ocelot_target id;
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@@ -377,18 +400,6 @@ static int mscc_ocelot_probe(struct plat
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ocelot->ptp = 1;
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}
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- regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_INIT], 1);
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- regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
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-
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- do {
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- msleep(1);
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- regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT],
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- &val);
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- } while (val);
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-
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- regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
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- regmap_field_write(ocelot->regfields[SYS_RESET_CFG_CORE_ENA], 1);
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-
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ocelot->num_cpu_ports = 1; /* 1 port on the switch, two groups */
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ports = of_get_child_by_name(np, "ethernet-ports");
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