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398fa87ef0
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. See: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html for the original discussion. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
90 lines
3.4 KiB
Diff
90 lines
3.4 KiB
Diff
From b3f1a164c7f742503dc7159011f7ad6b092b660e Mon Sep 17 00:00:00 2001
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From: Greg Ungerer <gerg@kernel.org>
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Date: Fri, 24 Nov 2023 14:15:28 +1000
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Subject: [PATCH] net: dsa: mv88e6xxx: fix marvell 6350 switch probing
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As of commit de5c9bf40c45 ("net: phylink: require supported_interfaces to
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be filled") Marvell 88e6350 switches fail to be probed:
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...
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mv88e6085 d0072004.mdio-mii:11: switch 0x3710 detected: Marvell 88E6350, revision 2
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mv88e6085 d0072004.mdio-mii:11: phylink: error: empty supported_interfaces
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error creating PHYLINK: -22
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mv88e6085: probe of d0072004.mdio-mii:11 failed with error -22
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...
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The problem stems from the use of mv88e6185_phylink_get_caps() to get
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the device capabilities. Create a new dedicated phylink_get_caps for the
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6351 family (which the 6350 is one of) to properly support their set of
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capabilities.
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According to chip.h the 6351 switch family includes the 6171, 6175, 6350
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and 6351 switches, so update each of these to use the correct
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phylink_get_caps.
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Fixes: de5c9bf40c45 ("net: phylink: require supported_interfaces to be filled")
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Signed-off-by: Greg Ungerer <gerg@kernel.org>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/mv88e6xxx/chip.c | 20 ++++++++++++++++----
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1 file changed, 16 insertions(+), 4 deletions(-)
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--- a/drivers/net/dsa/mv88e6xxx/chip.c
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+++ b/drivers/net/dsa/mv88e6xxx/chip.c
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@@ -652,6 +652,18 @@ static void mv88e6250_phylink_get_caps(s
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config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100;
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}
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+static void mv88e6351_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
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+ struct phylink_config *config)
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+{
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+ unsigned long *supported = config->supported_interfaces;
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+
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+ /* Translate the default cmode */
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+ mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
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+
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+ config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |
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+ MAC_1000FD;
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+}
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+
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static int mv88e6352_get_port4_serdes_cmode(struct mv88e6xxx_chip *chip)
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{
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u16 reg, val;
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@@ -4498,7 +4510,7 @@ static const struct mv88e6xxx_ops mv88e6
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.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
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.stu_getnext = mv88e6352_g1_stu_getnext,
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.stu_loadpurge = mv88e6352_g1_stu_loadpurge,
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- .phylink_get_caps = mv88e6185_phylink_get_caps,
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+ .phylink_get_caps = mv88e6351_phylink_get_caps,
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};
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static const struct mv88e6xxx_ops mv88e6172_ops = {
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@@ -4599,7 +4611,7 @@ static const struct mv88e6xxx_ops mv88e6
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.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
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.stu_getnext = mv88e6352_g1_stu_getnext,
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.stu_loadpurge = mv88e6352_g1_stu_loadpurge,
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- .phylink_get_caps = mv88e6185_phylink_get_caps,
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+ .phylink_get_caps = mv88e6351_phylink_get_caps,
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};
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static const struct mv88e6xxx_ops mv88e6176_ops = {
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@@ -5256,7 +5268,7 @@ static const struct mv88e6xxx_ops mv88e6
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.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
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.stu_getnext = mv88e6352_g1_stu_getnext,
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.stu_loadpurge = mv88e6352_g1_stu_loadpurge,
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- .phylink_get_caps = mv88e6185_phylink_get_caps,
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+ .phylink_get_caps = mv88e6351_phylink_get_caps,
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};
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static const struct mv88e6xxx_ops mv88e6351_ops = {
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@@ -5302,7 +5314,7 @@ static const struct mv88e6xxx_ops mv88e6
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.stu_loadpurge = mv88e6352_g1_stu_loadpurge,
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.avb_ops = &mv88e6352_avb_ops,
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.ptp_ops = &mv88e6352_ptp_ops,
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- .phylink_get_caps = mv88e6185_phylink_get_caps,
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+ .phylink_get_caps = mv88e6351_phylink_get_caps,
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};
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static const struct mv88e6xxx_ops mv88e6352_ops = {
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