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e58cd453d5
Add kernel support for SAMA7G5 by back-porting mainline kernel patches. Among SAMA7G5 features could be remembered: - ARM Cortex-A7 - double data rate multi-port dynamic RAM controller supporting DDR2, DDR3, DDR3L, LPDDR2, LPDDR3 up to 533MHz - peripherals for audio, video processing - 1 gigabit + 1 megabit Ethernet controllers - 6 CAN controllers - trust zone support - DVFS for CPU - criptography IPs Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
55 lines
2.3 KiB
Diff
55 lines
2.3 KiB
Diff
From dc07cbae6e96843d26e8f10b16e901620bd16462 Mon Sep 17 00:00:00 2001
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From: Tudor Ambarus <tudor.ambarus@microchip.com>
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Date: Fri, 9 Apr 2021 11:25:22 +0300
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Subject: [PATCH 154/247] pinctrl: at91-pio4: Fix slew rate disablement
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The slew rate was enabled by default for each configuration of the
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pin. In case the pin had more than one configuration, even if
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we set the slew rate as disabled in the device tree, the next pin
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configuration would set again the slew rate enabled by default,
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overwriting the slew rate disablement.
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Instead of enabling the slew rate by default for each pin configuration,
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enable the slew rate by default just once per pin, regardless of the
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number of configurations. This way the slew rate disablement will also
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work for cases where pins have multiple configurations.
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Fixes: c709135e576b ("pinctrl: at91-pio4: add support for slew-rate")
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Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
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Link: https://lore.kernel.org/r/20210409082522.625168-1-tudor.ambarus@microchip.com
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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drivers/pinctrl/pinctrl-at91-pio4.c | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
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index a5d328808e4c..4c01d8471ffa 100644
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--- a/drivers/pinctrl/pinctrl-at91-pio4.c
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+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
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@@ -801,6 +801,10 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev,
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conf = atmel_pin_config_read(pctldev, pin_id);
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+ /* Keep slew rate enabled by default. */
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+ if (atmel_pioctrl->slew_rate_support)
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+ conf |= ATMEL_PIO_SR_MASK;
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+
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for (i = 0; i < num_configs; i++) {
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unsigned int param = pinconf_to_config_param(configs[i]);
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unsigned int arg = pinconf_to_config_argument(configs[i]);
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@@ -808,10 +812,6 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev,
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dev_dbg(pctldev->dev, "%s: pin=%u, config=0x%lx\n",
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__func__, pin_id, configs[i]);
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- /* Keep slew rate enabled by default. */
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- if (atmel_pioctrl->slew_rate_support)
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- conf |= ATMEL_PIO_SR_MASK;
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-
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switch (param) {
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case PIN_CONFIG_BIAS_DISABLE:
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conf &= (~ATMEL_PIO_PUEN_MASK);
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--
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2.32.0
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