openwrt/target/linux/ath79/dts/ar9344_tplink_tl-wdr4300.dtsi
Sander Vanheule dae3927527 ath79: drop phy-mask property
The phy-mask property is no longer supported by the ag71xx-mdio driver,
so let's drop it.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-06-15 20:07:26 +02:00

134 lines
2.3 KiB
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar9344_tplink_tl-wdrxxxx.dtsi"
/ {
aliases {
label-mac-device = &ath9k;
};
gpio-export {
compatible = "gpio-export";
gpio_usb1_power {
gpio-export,name = "tp-link:power:usb1";
gpio-export,output = <1>;
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
};
gpio_usb2_power {
gpio-export,name = "tp-link:power:usb2";
gpio-export,output = <1>;
gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
};
gpio_ext_lna0 {
gpio-export,name = "tp-link:ext:lna0";
gpio-export,output = <1>;
gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
};
gpio_ext_lna1 {
gpio-export,name = "tp-link:ext:lna1";
gpio-export,output = <1>;
gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
};
};
};
&leds {
usb1 {
label = "green:usb1";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port1>;
linux,default-trigger = "usbport";
};
usb2 {
label = "green:usb2";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port2>;
linux,default-trigger = "usbport";
};
};
&usb {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
#trigger-source-cells = <0>;
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
hub_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
&usb_phy {
status = "okay";
};
&ath9k {
nvmem-cells = <&macaddr_uboot_1fc00>;
nvmem-cell-names = "mac-address";
};
&wmac {
nvmem-cells = <&macaddr_uboot_1fc00>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(-1)>;
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
qca,ar8327-initvals = <
0x04 0x07600000 /* PORT0 PAD MODE CTRL */
0x10 0x80000080 /* POWER_ON_STRAP */
0x50 0xc737c737 /* LED_CTRL0 */
0x54 0x00000000 /* LED_CTRL1 */
0x58 0x00000000 /* LED_CTRL2 */
0x5c 0x0030c300 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&eth0 {
status = "okay";
/* default for ar934x, except for 1000M */
pll-data = <0x06000000 0x00000101 0x00001616>;
nvmem-cells = <&macaddr_uboot_1fc00>;
nvmem-cell-names = "mac-address";
phy-mode = "rgmii";
phy-handle = <&phy0>;
};
&uboot {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_uboot_1fc00: macaddr@1fc00 {
reg = <0x1fc00 0x6>;
};
};