openwrt/target/linux/ath79/dts/ar7161_netgear_wndr.dtsi
Shiji Yang 520c90854c ath79: move reference clock node to SoC dtsi
AR7161, AR724x, AR9132 and QCA95xx only support fixed frequency external
crystal oscillator, so move reference clock node to SoC dtsi files.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2022-11-09 22:55:33 +01:00

213 lines
3.6 KiB
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7100.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/mtd/partitions/uimage.h>
/ {
aliases {
led-boot = &led_power_orange;
led-failsafe = &led_power_orange;
led-running = &led_power_green;
led-upgrade = &led_power_orange;
};
reset-leds {
compatible = "reset-leds";
usb_led {
label = "green:usb";
resets = <&rst 12>;
trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
linux,default-trigger = "usbport";
};
};
leds {
compatible = "gpio-leds";
wps {
label = "orange:wps";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
};
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
led_power_orange: power_orange {
label = "orange:power";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wps_green {
label = "green:wps";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
};
wan_green {
label = "green:wan";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan2g {
label = "green:wlan2g";
gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wlan5g {
label = "blue:wlan5g";
gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
rfkill {
label = "rfkill";
linux,code = <KEY_RFKILL>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
};
rtl8366s {
compatible = "realtek,rtl8366s";
gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
};
};
};
&usb_phy {
status = "okay";
};
&usb1 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
usb_ohci_port: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
usb_ehci_port: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&pcie0 {
status = "okay";
ath9k0: wifi@0,11 {
compatible = "pci168c,0029";
reg = <0x8800 0 0 0 0>;
#gpio-cells = <2>;
gpio-controller;
/* all WNDR3700 variants have four antennae dedicated
* to the 2.4GHz radio. Two antennae are available for
* each chain. The following configuration is the
* default setting which taken from the vendor's wifi
* code for that radio.
*
* All possible options [GPIO6,GPIO7,GPIO8,GPIO9]:
* [0,1,0,1], [0,1,1,0], [1,0,0,1], [1,0,1,0]
*/
antenna-demux {
gpio-hog;
line-name = "fixed antenna group 1";
gpios = <6 GPIO_ACTIVE_LOW>,
<7 GPIO_ACTIVE_HIGH>,
<8 GPIO_ACTIVE_LOW>,
<9 GPIO_ACTIVE_HIGH>;
output-high;
};
};
ath9k1: wifi@0,12 {
compatible = "pci168c,0029";
reg = <0x9000 0 0 0 0>;
#gpio-cells = <2>;
gpio-controller;
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
};
};
};
&eth0 {
status = "okay";
pll-data = <0x11110000 0x00001099 0x00991099>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&eth1 {
status = "okay";
pll-data = <0x11110000 0x00001099 0x00991099>;
phy-handle = <&phy4>;
};