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https://github.com/openwrt/openwrt.git
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62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
632 lines
12 KiB
Diff
632 lines
12 KiB
Diff
From 104dcc1aff0ae5509ad9875c11e3e0d8c290709d Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Tue, 2 Jun 2020 17:19:51 +0100
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Subject: [PATCH] ARM: dts: Add bcm2711-rpi-cm4.dts
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Add initial DTS file for Compute Module 4.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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arch/arm/boot/dts/Makefile | 3 +-
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arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 586 ++++++++++++++++++++++++++
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arch/arm/boot/dts/overlays/README | 6 +
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3 files changed, 594 insertions(+), 1 deletion(-)
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create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4.dts
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -12,7 +12,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
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bcm2710-rpi-3-b.dtb \
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bcm2711-rpi-4-b.dtb \
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bcm2710-rpi-3-b-plus.dtb \
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- bcm2710-rpi-cm3.dtb
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+ bcm2710-rpi-cm3.dtb \
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+ bcm2711-rpi-cm4.dtb
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dtb-$(CONFIG_ARCH_ALPINE) += \
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alpine-db.dtb
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
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@@ -0,0 +1,586 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/dts-v1/;
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+#include "bcm2711.dtsi"
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+#include "bcm2835-rpi.dtsi"
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+
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+/ {
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+ compatible = "raspberrypi,4-compute-module", "brcm,bcm2711";
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+ model = "Raspberry Pi Compute Module 4";
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+
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+ chosen {
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+ /* 8250 auxiliary UART instead of pl011 */
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+ stdout-path = "serial1:115200n8";
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+ };
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+
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+ /* Will be filled by the bootloader */
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0 0 0>;
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+ };
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+
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+ aliases {
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+ ethernet0 = &genet;
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+ };
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+
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+ leds {
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+ act {
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+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ pwr {
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+ label = "PWR";
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+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+ wifi_pwrseq: wifi-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ sd_io_1v8_reg: sd_io_1v8_reg {
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+ compatible = "regulator-gpio";
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+ regulator-name = "vdd-sd-io";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-settling-time-us = <5000>;
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+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
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+ states = <1800000 0x1
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+ 3300000 0x0>;
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+ status = "okay";
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+ };
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+};
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+
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+&firmware {
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+ expgpio: gpio {
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+ compatible = "raspberrypi,firmware-gpio";
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ gpio-line-names = "BT_ON",
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+ "WL_ON",
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+ "PWR_LED_OFF",
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+ "ANT1",
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+ "VDD_SD_IO_SEL",
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+ "CAM_GPIO",
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+ "SD_PWR_ON",
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+ "ANT2";
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+ status = "okay";
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+
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+ ant1: ant1 {
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+ gpio-hog;
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+ gpios = <3 GPIO_ACTIVE_HIGH>;
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+ output-high;
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+ };
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+
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+ ant2: ant2 {
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+ gpio-hog;
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+ gpios = <7 GPIO_ACTIVE_HIGH>;
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+ output-low;
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+ };
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+ };
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+};
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+
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+&pwm1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
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+ status = "okay";
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+};
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+
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+/* SDHCI is used to control the SDIO for wireless */
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+&sdhci {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_gpio34>;
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+ bus-width = <4>;
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+ non-removable;
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+ mmc-pwrseq = <&wifi_pwrseq>;
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+ status = "okay";
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+
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+ brcmf: wifi@1 {
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+ reg = <1>;
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+ compatible = "brcm,bcm4329-fmac";
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+ };
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+};
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+
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+/* EMMC2 is used to drive the SD card */
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+&emmc2 {
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+ vqmmc-supply = <&sd_io_1v8_reg>;
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+ broken-cd;
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+ status = "okay";
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+};
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+
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+&genet {
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+ phy-handle = <&phy1>;
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+ phy-mode = "rgmii-rxid";
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+ status = "okay";
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+};
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+
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+&genet_mdio {
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+ phy1: ethernet-phy@1 {
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+ /* No PHY interrupt */
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+ reg = <0x1>;
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+ };
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+};
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+
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+/* uart0 communicates with the BT module */
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
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+ uart-has-rtscts;
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+ status = "okay";
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+
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+ bluetooth {
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+ compatible = "brcm,bcm43438-bt";
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+ max-speed = <2000000>;
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+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
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+ };
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+};
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+
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+/* uart1 is mapped to the pin header */
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+&uart1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart1_gpio14>;
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+ status = "okay";
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+};
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+
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+&vchiq {
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+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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+};
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+
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+&vc4 {
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+ status = "okay";
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+};
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+
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+&pixelvalve0 {
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+ status = "okay";
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+};
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+
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+&pixelvalve1 {
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+ status = "okay";
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+};
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+
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+&pixelvalve2 {
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+ status = "okay";
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+};
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+
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+&pixelvalve3 {
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+ status = "okay";
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+};
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+
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+&pixelvalve4 {
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+ status = "okay";
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+};
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+
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+&hdmi0 {
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+ status = "okay";
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+};
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+
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+&ddc0 {
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+ status = "okay";
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+};
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+
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+&hdmi1 {
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+ status = "okay";
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+};
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+
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+&ddc1 {
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+ status = "okay";
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+};
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+
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+// =============================================
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+// Downstream rpi- changes
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+
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+#include "bcm270x.dtsi"
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+
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+/ {
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+ soc {
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+ /delete-node/ pixelvalve@7e807000;
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+ /delete-node/ hdmi@7e902000;
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+ };
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+};
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+
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+#include "bcm2711-rpi.dtsi"
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+#include "bcm283x-rpi-csi1-2lane.dtsi"
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+#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
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+
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+/delete-node/ &emmc2;
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+
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+/ {
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+ chosen {
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+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
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+ };
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+
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+ aliases {
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+ serial0 = &uart1;
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+ serial1 = &uart0;
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+ mmc0 = &emmc2;
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+ mmc1 = &mmcnr;
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+ mmc2 = &sdhost;
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+ /delete-property/ i2c2;
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+ i2c3 = &i2c3;
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+ i2c4 = &i2c4;
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+ i2c5 = &i2c5;
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+ i2c6 = &i2c6;
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+ /delete-property/ ethernet;
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+ /delete-property/ intc;
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+ pcie0 = &pcie0;
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+ emmc2bus = &emmc2bus;
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+ };
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+
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+ emmc2bus: emmc2bus {
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+ compatible = "simple-bus";
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+ #address-cells = <2>;
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+ #size-cells = <1>;
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+
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+ ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
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+ dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
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+
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+ emmc2: emmc2@7e340000 {
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+ compatible = "brcm,bcm2711-emmc2";
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+ status = "okay";
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+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clocks BCM2711_CLOCK_EMMC2>;
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+ reg = <0x0 0x7e340000 0x100>;
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+ vqmmc-supply = <&sd_io_1v8_reg>;
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+ broken-cd;
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+ };
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+ };
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+
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+ /delete-node/ wifi-pwrseq;
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+};
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+
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+&mmcnr {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdio_pins>;
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+ bus-width = <4>;
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+ status = "okay";
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+};
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+
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+&uart0 {
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+ pinctrl-0 = <&uart0_pins &bt_pins>;
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+ status = "okay";
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+
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+ /delete-node/ bluetooth;
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+};
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+
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+&uart1 {
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+ pinctrl-0 = <&uart1_pins>;
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+};
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+
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+&spi0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
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+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
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+
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+ spidev0: spidev@0{
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ };
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+
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+ spidev1: spidev@1{
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+ compatible = "spidev";
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+ reg = <1>; /* CE1 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ };
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+};
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+
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+&gpio {
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+ spi0_pins: spi0_pins {
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+ brcm,pins = <9 10 11>;
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+ brcm,function = <BCM2835_FSEL_ALT0>;
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+ };
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+
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+ spi0_cs_pins: spi0_cs_pins {
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+ brcm,pins = <8 7>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ spi3_pins: spi3_pins {
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+ brcm,pins = <1 2 3>;
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+ brcm,function = <BCM2835_FSEL_ALT3>;
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+ };
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+
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+ spi3_cs_pins: spi3_cs_pins {
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+ brcm,pins = <0 24>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ spi4_pins: spi4_pins {
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+ brcm,pins = <5 6 7>;
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+ brcm,function = <BCM2835_FSEL_ALT3>;
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+ };
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+
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+ spi4_cs_pins: spi4_cs_pins {
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+ brcm,pins = <4 25>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ spi5_pins: spi5_pins {
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+ brcm,pins = <13 14 15>;
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+ brcm,function = <BCM2835_FSEL_ALT3>;
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+ };
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+
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+ spi5_cs_pins: spi5_cs_pins {
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+ brcm,pins = <12 26>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ spi6_pins: spi6_pins {
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+ brcm,pins = <19 20 21>;
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+ brcm,function = <BCM2835_FSEL_ALT3>;
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+ };
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+
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+ spi6_cs_pins: spi6_cs_pins {
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+ brcm,pins = <18 27>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ i2c0_pins: i2c0 {
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+ brcm,pins = <0 1>;
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+ brcm,function = <BCM2835_FSEL_ALT0>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c1_pins: i2c1 {
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+ brcm,pins = <2 3>;
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+ brcm,function = <BCM2835_FSEL_ALT0>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c3_pins: i2c3 {
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+ brcm,pins = <4 5>;
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+ brcm,function = <BCM2835_FSEL_ALT5>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c4_pins: i2c4 {
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+ brcm,pins = <8 9>;
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+ brcm,function = <BCM2835_FSEL_ALT5>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c5_pins: i2c5 {
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+ brcm,pins = <12 13>;
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+ brcm,function = <BCM2835_FSEL_ALT5>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c6_pins: i2c6 {
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+ brcm,pins = <22 23>;
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+ brcm,function = <BCM2835_FSEL_ALT5>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2s_pins: i2s {
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+ brcm,pins = <18 19 20 21>;
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+ brcm,function = <BCM2835_FSEL_ALT0>;
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+ };
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+
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+ sdio_pins: sdio_pins {
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+ brcm,pins = <34 35 36 37 38 39>;
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+ brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
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+ brcm,pull = <0 2 2 2 2 2>;
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+ };
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+
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+ bt_pins: bt_pins {
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+ brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
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+ // to fool pinctrl
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+ brcm,function = <0>;
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+ brcm,pull = <2>;
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+ };
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+
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+ uart0_pins: uart0_pins {
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+ brcm,pins = <32 33>;
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+ brcm,function = <BCM2835_FSEL_ALT3>;
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+ brcm,pull = <0 2>;
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+ };
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+
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+ uart1_pins: uart1_pins {
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+ brcm,pins;
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+ brcm,function;
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+ brcm,pull;
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+ };
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+
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+ uart2_pins: uart2_pins {
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+ brcm,pins = <0 1>;
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+ brcm,function = <BCM2835_FSEL_ALT4>;
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+ brcm,pull = <0 2>;
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+ };
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+
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+ uart3_pins: uart3_pins {
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+ brcm,pins = <4 5>;
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+ brcm,function = <BCM2835_FSEL_ALT4>;
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+ brcm,pull = <0 2>;
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+ };
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+
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+ uart4_pins: uart4_pins {
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+ brcm,pins = <8 9>;
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+ brcm,function = <BCM2835_FSEL_ALT4>;
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+ brcm,pull = <0 2>;
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+ };
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+
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+ uart5_pins: uart5_pins {
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+ brcm,pins = <12 13>;
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+ brcm,function = <BCM2835_FSEL_ALT4>;
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+ brcm,pull = <0 2>;
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+ };
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+};
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+
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+&i2c0if {
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+ clock-frequency = <100000>;
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+};
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+
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+&i2c1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c1_pins>;
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+ clock-frequency = <100000>;
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+};
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+
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+&i2s {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2s_pins>;
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+};
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+
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+/ {
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+ __overrides__ {
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+ /delete-property/ i2c2_baudrate;
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+ /delete-property/ i2c2_iknowwhatimdoing;
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+ };
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|
+};
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+
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+// =============================================
|
|
+// Board specific stuff here
|
|
+
|
|
+/ {
|
|
+ sd_vcc_reg: sd_vcc_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc-sd";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-boot-on;
|
|
+ enable-active-high;
|
|
+ gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&sdhost {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&emmc2 {
|
|
+ vmmc-supply = <&sd_vcc_reg>;
|
|
+ bus-width = <8>;
|
|
+};
|
|
+
|
|
+&phy1 {
|
|
+ led-modes = <0x00 0x08>; /* link/activity link */
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <40 41>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ pwr_led: pwr {
|
|
+ label = "led1";
|
|
+ linux,default-trigger = "default-on";
|
|
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pwm1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+&vc4 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve0 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve2 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve3 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve4 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&hdmi0 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&ddc0 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&hdmi1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&ddc1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ pwr_led_gpio = <&pwr_led>,"gpios:4";
|
|
+ pwr_led_activelow = <&pwr_led>,"gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
|
|
+
|
|
+ eth_led0 = <&phy1>,"led-modes:0";
|
|
+ eth_led1 = <&phy1>,"led-modes:4";
|
|
+
|
|
+ ant1 = <&ant1>,"output-high?=on",
|
|
+ <&ant1>, "output-low?=off",
|
|
+ <&ant2>, "output-high?=off",
|
|
+ <&ant2>, "output-low?=on";
|
|
+ ant2 = <&ant1>,"output-high?=off",
|
|
+ <&ant1>, "output-low?=on",
|
|
+ <&ant2>, "output-high?=on",
|
|
+ <&ant2>, "output-low?=off";
|
|
+ noant = <&ant1>,"output-high?=off",
|
|
+ <&ant1>, "output-low?=on",
|
|
+ <&ant2>, "output-high?=off",
|
|
+ <&ant2>, "output-low?=on";
|
|
+
|
|
+ spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
|
|
+ <&spi0>, "dmas:8=", <&dma40>;
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/boot/dts/overlays/README
|
|
+++ b/arch/arm/boot/dts/overlays/README
|
|
@@ -92,6 +92,12 @@ Name: <The base DTB>
|
|
Info: Configures the base Raspberry Pi hardware
|
|
Load: <loaded automatically>
|
|
Params:
|
|
+ ant1 Select antenna 1 (default). CM4 only.
|
|
+
|
|
+ ant2 Select antenna 2. CM4 only.
|
|
+
|
|
+ noant Disable both antennas. CM4 only.
|
|
+
|
|
audio Set to "on" to enable the onboard ALSA audio
|
|
interface (default "off")
|
|
|