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e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
207 lines
3.3 KiB
Plaintext
207 lines
3.3 KiB
Plaintext
/dts-v1/;
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#include "mt7628an.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "zyxel,keenetic-extra-ii", "mediatek,mt7628an-soc";
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model = "ZyXEL Keenetic Extra II";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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chosen {
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bootargs = "console=ttyS0,57600n8";
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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fn {
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label = "fn";
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gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "keenetic-extra-ii:green:power";
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gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
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default-state = "keep";
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};
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internet {
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label = "keenetic-extra-ii:green:internet";
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gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
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};
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wifi {
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label = "keenetic-extra-ii:green:wifi";
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gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
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};
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usb {
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label = "keenetic-extra-ii:green:usb";
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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trigger-sources = <&ohci_port1>, <&ehci_port1>;
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linux,default-trigger = "usbport";
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};
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};
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gpio_export {
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compatible = "gpio-export";
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#size-cells = <0>;
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usbpower {
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gpio-export,name = "usbpower";
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gpio-export,output = <1>;
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gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-config";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xe90000>;
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};
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partition@ee0000 {
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label = "config_1";
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reg = <0xee0000 0x10000>;
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read-only;
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};
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partition@ef0000 {
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label = "storage";
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reg = <0xef0000 0x100000>;
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read-only;
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};
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partition@ff0000 {
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label = "dump";
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reg = <0xff0000 0x10000>;
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read-only;
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};
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partition@1000000 {
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label = "u-state";
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reg = <0x1000000 0x30000>;
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read-only;
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};
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partition@1030000 {
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label = "u-config_res";
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reg = <0x1030000 0x10000>;
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read-only;
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};
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partition@1040000 {
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label = "rf-eeprom_res";
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reg = <0x1040000 0x10000>;
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read-only;
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};
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partition@1050000 {
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label = "firmware_2";
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reg = <0x1050000 0xe90000>;
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read-only;
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};
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partition@1ee0000 {
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label = "config_2";
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reg = <0x1ee0000 0x10000>;
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read-only;
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};
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};
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};
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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ðernet {
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mtd-mac-address = <&factory 0x4>;
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mediatek,portmap = "wllll";
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};
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&wmac {
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status = "okay";
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&state_default {
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gpio {
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ralink,group = "gpio", "i2s", "refclk", "spi cs1", "uart1", "wled_an";
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ralink,function = "gpio";
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};
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};
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