openwrt/target/linux/ramips/dts/mt7621_hiwifi_hc5962.dts
Adrian Schmutzler e4ce3109f2 ramips: simplify state_default/pinctrl0 in device DTS files
The node pinctrl0 is already set up in the SOC DTSI files, but
defined again as member of pinctrl in most of the device DTS(I)
files. This patch removes this redundancy for the entire ramips
target.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-12-23 02:24:55 +01:00

150 lines
2.3 KiB
Plaintext

/dts-v1/;
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "hiwifi,hc5962", "mediatek,mt7621-soc";
model = "HiWiFi HC5962";
aliases {
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
};
chosen {
bootargs = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
led_status: status {
label = "hc5962:white:status";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
system {
label = "hc5962:red:system";
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RESTART>;
};
};
};
&nand {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "debug";
reg = <0x80000 0x80000>;
read-only;
};
factory: partition@100000 {
label = "factory";
reg = <0x100000 0x40000>;
read-only;
};
partition@140000 {
label = "kernel";
reg = <0x140000 0x200000>;
};
partition@340000 {
label = "ubi";
reg = <0x340000 0x1E00000>;
};
partition@2140000 {
label = "hw_panic";
reg = <0x2140000 0x80000>;
read-only;
};
partition@21c0000 {
label = "bdinfo";
reg = <0x21c0000 0x80000>;
read-only;
};
partition@2240000 {
label = "backup";
reg = <0x2240000 0x80000>;
read-only;
};
partition@22c0000 {
label = "overly";
reg = <0x22c0000 0x1000000>;
};
partition@32c0000 {
label = "firmware_backup";
reg = <0x32c0000 0x2000000>;
};
partition@52c0000 {
label = "oem";
reg = <0x52c0000 0x200000>;
};
partition@54c0000 {
label = "opt";
reg = <0x54c0000 0x2ac0000>;
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&state_default {
gpio {
ralink,group = "uart3", "jtag";
ralink,function = "gpio";
};
};