openwrt/target/linux/ramips/dts/mt7621_asus_rt-acx5p.dtsi
Adrian Schmutzler e4ce3109f2 ramips: simplify state_default/pinctrl0 in device DTS files
The node pinctrl0 is already set up in the SOC DTSI files, but
defined again as member of pinctrl in most of the device DTS(I)
files. This patch removes this redundancy for the entire ramips
target.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-12-23 02:24:55 +01:00

156 lines
2.4 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
bootargs = "console=ttyS0,57600";
};
palmbus: palmbus@1E000000 {
i2c@900 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "rt-ac85p:blue:power";
gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
};
wlan2g {
label = "rt-ac85p:blue:wlan2g";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0radio";
};
wlan5g {
label = "rt-ac85p:blue:wlan5g";
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1radio";
};
};
};
&sdhci {
status = "okay";
};
&nand {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0xe0000>;
read-only;
};
partition@e0000 {
label = "u-boot-env";
reg = <0xe0000 0x100000>;
read-only;
};
factory: partition@1e0000 {
label = "factory";
reg = <0x1e0000 0x100000>;
read-only;
};
factory2: partition@2e0000 {
label = "factory2";
reg = <0x2e0000 0x100000>;
read-only;
};
partition@3e0000 {
label = "kernel";
reg = <0x3e0000 0x400000>;
};
partition@7e0000 {
label = "ubi";
reg = <0x7e0000 0x2e00000>;
};
partition@35e0000 {
label = "firmware2";
reg = <0x35e0000 0x3200000>;
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi0: wifi@0,0 {
compatible = "pci14c3,7615";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
wifi1: wifi@0,0 {
compatible = "pci14c3,7615";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&ethernet {
mtd-mac-address = <&factory 0xe000>;
mediatek,portmap = "wllll";
port@5 {
status = "disabled";
};
};
&i2c {
status = "disabled";
};
&state_default {
gpio {
ralink,group = "uart2", "uart3", "i2c";
ralink,function = "gpio";
};
};