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Qualcomm Atheros IPQ807x is a modern WiSoC featuring: * Quad Core ARMv8 Cortex A-53 * @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye * @ 1.4 GHz (IPQ8070A/1A) Codename Acorn * Dual Band simultaneaous IEEE 802.11ax * 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A) * 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A) * 5G: 2x2/80MHz (IPQ8070A) * 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A) * 2G: 2x2/40MHz (IPQ8070A/1A) * 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports) * 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye * 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn * DDR3L/4 32/16 bit up to 2400MT/s * SDIO 3.0/SD card 3.0/eMMC 5.1 * Dual USB 3.0 * One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane) * Parallel NAND (ONFI)/LCD * 6x QUP BLSP SPI/I2C/UART * I2S, PCM, and TDMA * HW PWM * 1.8V configurable GPIO * Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc) Note that only v2 SOC models aka the ones ending with A suffix are supported, v1 models do not comply to the final 802.11ax and have lower clocks, lack the Gen3 PCIe etc. SoC itself has two UBI32 cores for the NSS offloading system, however currently no offloading is supported. Signed-off-by: Robert Marko <robimarko@gmail.com>
71 lines
2.3 KiB
Diff
71 lines
2.3 KiB
Diff
From 7bd608426c407a79debea54b2b243950f330c5b8 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Fri, 19 Aug 2022 00:06:24 +0200
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Subject: [PATCH] clk: qcom: apss-ipq-pll: use OF match data for Alpha PLL
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config
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Convert the driver to use OF match data for providing the Alpha PLL config
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per compatible.
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This is required for IPQ8074 support since it uses a different Alpha PLL
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config.
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While we are here rename "ipq_pll_config" to "ipq6018_pll_config" to make
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it clear that it is for IPQ6018 only.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20220818220628.339366-5-robimarko@gmail.com
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---
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drivers/clk/qcom/apss-ipq-pll.c | 12 +++++++++---
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1 file changed, 9 insertions(+), 3 deletions(-)
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--- a/drivers/clk/qcom/apss-ipq-pll.c
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+++ b/drivers/clk/qcom/apss-ipq-pll.c
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@@ -2,6 +2,7 @@
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// Copyright (c) 2018, The Linux Foundation. All rights reserved.
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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+#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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@@ -36,7 +37,7 @@ static struct clk_alpha_pll ipq_pll = {
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},
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};
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-static const struct alpha_pll_config ipq_pll_config = {
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+static const struct alpha_pll_config ipq6018_pll_config = {
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.l = 0x37,
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.config_ctl_val = 0x04141200,
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.config_ctl_hi_val = 0x0,
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@@ -54,6 +55,7 @@ static const struct regmap_config ipq_pl
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static int apss_ipq_pll_probe(struct platform_device *pdev)
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{
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+ const struct alpha_pll_config *ipq_pll_config;
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struct device *dev = &pdev->dev;
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struct regmap *regmap;
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void __iomem *base;
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@@ -67,7 +69,11 @@ static int apss_ipq_pll_probe(struct pla
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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- clk_alpha_pll_configure(&ipq_pll, regmap, &ipq_pll_config);
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+ ipq_pll_config = of_device_get_match_data(&pdev->dev);
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+ if (!ipq_pll_config)
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+ return -ENODEV;
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+
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+ clk_alpha_pll_configure(&ipq_pll, regmap, ipq_pll_config);
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ret = devm_clk_register_regmap(dev, &ipq_pll.clkr);
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if (ret)
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@@ -78,7 +84,7 @@ static int apss_ipq_pll_probe(struct pla
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}
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static const struct of_device_id apss_ipq_pll_match_table[] = {
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- { .compatible = "qcom,ipq6018-a53pll" },
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+ { .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_config },
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{ }
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};
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MODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table);
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