Tomasz Maciej Nowak dee8fcfe9f tegra: correct cpu subtype ... Tegra 2 processors have only 16 double-precision registers. The change introduced by 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") switched accidentally the toolchain for tegra target to cpu type with 32 double-precision registers. This stems from gcc defaults which assume "vfpv3-d32" if only "vfpv3" as mfpu is specified. That change resulted in unusable image, in which kernel will kill userspace as soon as it causing "Illegal instruction". Ref: https://forum.openwrt.org/t/gcc-was-broken-on-mvebu-armada-370-device-after-commit-on-2019-03-25/43272 Fixes: 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl> (cherry picked from commit 43d1d88510)		2020-04-18 00:18:13 +02:00
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base-files	treewide: use new procd sysupgrade $UPGRADE_BACKUP variable	2019-09-12 13:27:29 +02:00
image	tegra: add vendor string to device name	2019-05-15 13:34:23 +02:00
patches-4.14	tegra: add support for CompuLab TrimSlice	2019-04-06 14:48:46 +02:00
config-4.14	tegra: add support for CompuLab TrimSlice	2019-04-06 14:48:46 +02:00
Makefile	tegra: correct cpu subtype	2020-04-18 00:18:13 +02:00