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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
145 lines
4.2 KiB
Diff
145 lines
4.2 KiB
Diff
From 16af9ae925fdb05960f644b6cc84098af8aa3956 Mon Sep 17 00:00:00 2001
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From: Daniel Scally <djrscally@gmail.com>
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Date: Tue, 15 Feb 2022 23:07:33 +0000
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Subject: [PATCH] media: i2c: Add support for 19.2MHz clock to ov7251
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The OV7251 sensor is used as the IR camera sensor on the Microsoft
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Surface line of tablets; this provides a 19.2MHz external clock. Add
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the ability to support that rate to the driver by defining a new set
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of PLL configs. Extend the clock handling in .probe() to check for
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either supported frequency.
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Signed-off-by: Daniel Scally <djrscally@gmail.com>
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---
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drivers/media/i2c/ov7251.c | 61 ++++++++++++++++++++++++++++----------
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1 file changed, 45 insertions(+), 16 deletions(-)
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--- a/drivers/media/i2c/ov7251.c
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+++ b/drivers/media/i2c/ov7251.c
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@@ -134,10 +134,19 @@ static inline struct ov7251 *to_ov7251(s
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}
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enum xclk_rate {
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+ OV7251_19_2_MHZ,
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OV7251_24_MHZ,
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OV7251_NUM_SUPPORTED_RATES
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};
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+static const struct ov7251_pll1_config ov7251_pll1_config_19_2_mhz = {
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+ .pre_div = 0x03,
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+ .mult = 0x4b,
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+ .div = 0x01,
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+ .pix_div = 0x0a,
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+ .mipi_div = 0x05
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+};
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+
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static const struct ov7251_pll1_config ov7251_pll1_config_24_mhz = {
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.pre_div = 0x03,
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.mult = 0x64,
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@@ -146,6 +155,14 @@ static const struct ov7251_pll1_config o
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.mipi_div = 0x05
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};
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+static const struct ov7251_pll2_config ov7251_pll2_config_19_2_mhz = {
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+ .pre_div = 0x04,
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+ .mult = 0x32,
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+ .div = 0x00,
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+ .sys_div = 0x05,
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+ .adc_div = 0x04
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+};
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+
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static const struct ov7251_pll2_config ov7251_pll2_config_24_mhz = {
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.pre_div = 0x04,
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.mult = 0x28,
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@@ -154,12 +171,18 @@ static const struct ov7251_pll2_config o
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.adc_div = 0x04
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};
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+static const struct ov7251_pll_configs ov7251_pll_configs_19_2_mhz = {
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+ .pll1 = &ov7251_pll1_config_19_2_mhz,
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+ .pll2 = &ov7251_pll2_config_19_2_mhz
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+};
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+
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static const struct ov7251_pll_configs ov7251_pll_configs_24_mhz = {
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.pll1 = &ov7251_pll1_config_24_mhz,
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.pll2 = &ov7251_pll2_config_24_mhz
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};
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static const struct ov7251_pll_configs *ov7251_pll_configs[] = {
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+ [OV7251_19_2_MHZ] = &ov7251_pll_configs_19_2_mhz,
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[OV7251_24_MHZ] = &ov7251_pll_configs_24_mhz
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};
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@@ -553,6 +576,7 @@ static const struct reg_value ov7251_set
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};
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static const unsigned long supported_xclk_rates[] = {
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+ [OV7251_19_2_MHZ] = 19200000,
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[OV7251_24_MHZ] = 24000000,
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};
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@@ -1424,6 +1448,7 @@ static int ov7251_probe(struct i2c_clien
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struct device *dev = &client->dev;
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struct ov7251 *ov7251;
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u8 chip_id_high, chip_id_low, chip_rev;
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+ unsigned int rate = 0;
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int ret;
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int i;
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@@ -1439,35 +1464,39 @@ static int ov7251_probe(struct i2c_clien
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return ret;
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/* get system clock (xclk) */
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- ov7251->xclk = devm_clk_get(dev, "xclk");
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+ ov7251->xclk = devm_clk_get(dev, NULL);
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if (IS_ERR(ov7251->xclk)) {
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dev_err(dev, "could not get xclk");
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return PTR_ERR(ov7251->xclk);
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}
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+ /*
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+ * We could have either a 24MHz or 19.2MHz clock rate from either dt or
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+ * ACPI. We also need to support the IPU3 case which will have both an
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+ * external clock AND a clock-frequency property.
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+ */
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ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
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- &ov7251->xclk_freq);
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- if (ret) {
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- dev_err(dev, "could not get xclk frequency\n");
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- return ret;
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+ &rate);
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+ if (!ret && ov7251->xclk) {
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+ ret = clk_set_rate(ov7251->xclk, rate);
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+ if (ret)
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+ return dev_err_probe(dev, ret,
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+ "failed to set clock rate\n");
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+ } else if (ret && !ov7251->xclk) {
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+ return dev_err_probe(dev, ret, "invalid clock config\n");
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}
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- /* external clock must be 24MHz, allow 1% tolerance */
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- if (ov7251->xclk_freq < 23760000 || ov7251->xclk_freq > 24240000) {
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- dev_err(dev, "external clock frequency %u is not supported\n",
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- ov7251->xclk_freq);
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- return -EINVAL;
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- }
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+ ov7251->xclk_freq = rate ? rate : clk_get_rate(ov7251->xclk);
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- ret = clk_set_rate(ov7251->xclk, ov7251->xclk_freq);
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- if (ret) {
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- dev_err(dev, "could not set xclk frequency\n");
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- return ret;
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- }
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for (i = 0; i < ARRAY_SIZE(supported_xclk_rates); i++)
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if (ov7251->xclk_freq == supported_xclk_rates[i])
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break;
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+ if (i == ARRAY_SIZE(supported_xclk_rates))
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+ return dev_err_probe(dev, -EINVAL,
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+ "clock rate %u Hz is unsupported\n",
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+ ov7251->xclk_freq);
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+
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ov7251->pll_configs = ov7251_pll_configs[i];
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ov7251->io_regulator = devm_regulator_get(dev, "vdddo");
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