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8ff631feff
This commit adds support for the AVM FRITZ!WLAN Repeater DVB-C
SOC: Qualcomm Atheros QCA9556
RAM: 64 MiB
FLASH: 16 MB SPI-NOR
WLAN: QCA9556 3T3R 2.4 GHZ b/g/n and
QCA9880 3T3R 5 GHz n/ac
ETH: Atheros AR8033 1000 Base-T
DVB-C: EM28174 with MaxLinear MXL251 tuner
BTN: WPS Button
LED: Power, WLAN, TV, RSSI0-4
Tested and working:
- Ethernet (correct MAC, gigabit, iperf3 about 200 Mbit/s)
- 2.4 GHz Wi-Fi (correct MAC)
- 5 GHz Wi-Fi (correct MAC)
- WPS Button (tested using wifitoggle)
- LEDs
- Installation via EVA bootloader (FTP recovery)
- OpenWrt sysupgrade (both CLI and LuCI)
- Download of "urlader" (mtd0)
Not working:
- Internal USB
- DVB-C em28174+MxL251 (depends on internal USB)
Installation via EVA bootloader (FTP recovery):
Set NIC to 192.168.178.3/24 gateway 192.168.178.1 and power on the device,
connect to 192.168.178.1 through FTP and sign in with adam2/adam2:
ftp> quote USER adam2
ftp> quote PASS adam2
ftp> binary
ftp> debug
ftp> passive
ftp> quote MEDIA FLSH
ftp> put openwrt-sysupgrade.bin mtd1
Wait for "Transfer complete" together with the transfer details.
Wait two minutes to make sure flash is complete (just to be safe).
Then restart the device (power off and on) to boot into OpenWrt.
Revert your NIC settings to reach OpenWrt at 192.168.1.1
Signed-off-by: Natalie Kagelmacher <nataliek@pm.me>
[fixed sorting - removed change to other board -
prettified commit message]
Signed-off-by: David Bauer <mail@david-bauer.net>
112 lines
2.1 KiB
Plaintext
112 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qca9556_avm_fritz-repeater.dtsi"
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/ {
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compatible = "avm,fritzdvbc", "qca,qca9556";
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model = "AVM FRITZ!WLAN Repeater DVB-C";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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led_spi {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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sck-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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mosi-gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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num-chipselects = <0>;
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spi_gpio: led_gpio@0 {
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compatible = "fairchild,74hc595";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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registers-number = <2>;
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spi-max-frequency = <10000000>;
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gpio_latch_bit {
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gpio-hog;
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gpios = <16 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "gpio-latch-bit";
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};
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};
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};
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/*
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* GPIO pins 100 or greater in the vendor GPL dump are redirected
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* to the shift register.
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* So OEM source pin 100 becomes 0 on the SR and so forth.
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*/
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "fritzdvbc:green:power";
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gpios = <&spi_gpio 6 GPIO_ACTIVE_LOW>;
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};
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wlan {
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label = "fritzdvbc:green:wlan";
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gpios = <&spi_gpio 7 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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tv {
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label = "fritzdvbc:green:tv";
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gpios = <&spi_gpio 5 GPIO_ACTIVE_LOW>;
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};
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rssihigh {
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label = "fritzdvbc:green:rssihigh";
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gpios = <&spi_gpio 1 GPIO_ACTIVE_LOW>;
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};
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rssimediumhigh {
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label = "fritzdvbc:green:rssimediumhigh";
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gpios = <&spi_gpio 2 GPIO_ACTIVE_LOW>;
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};
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rssimedium {
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label = "fritzdvbc:green:rssimedium";
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gpios = <&spi_gpio 3 GPIO_ACTIVE_LOW>;
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};
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rssimediumlow {
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label = "fritzdvbc:green:rssimediumlow";
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gpios = <&spi_gpio 4 GPIO_ACTIVE_LOW>;
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};
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rssilow {
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label = "fritzdvbc:green:rssilow";
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gpios = <&spi_gpio 0 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&pcie0 {
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status = "okay";
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};
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&gpio {
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reset-pcie-ep {
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gpio-hog;
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gpios = <109 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "PCIE EP reset";
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};
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reset-pcie-bus {
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gpio-hog;
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gpios = <110 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "PCIE Bus reset";
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};
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};
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