mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 06:33:41 +00:00
635f111148
In ath79, for several SoCs the console bootargs are defined to the very same value in every device's DTS. Consolidate these definitions in the SoC dtsi files and drop further redundant definitions elsewhere. The only device without any bootargs set has been OpenMesh OM5P-AC V2. This will now inherit the setting from qca955x.dtsi Note that while this tidies up master a lot, it might develop into a frequent pitfall for backports. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
237 lines
3.8 KiB
Plaintext
237 lines
3.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
#include "ar7100.dtsi"
|
|
|
|
/ {
|
|
compatible = "dlink,dir-825-b1", "qca,ar7161";
|
|
model = "D-Link DIR825B1";
|
|
|
|
aliases {
|
|
led-boot = &led_power_orange;
|
|
led-failsafe = &led_power_orange;
|
|
led-running = &led_power_blue;
|
|
led-upgrade = &led_power_orange;
|
|
};
|
|
|
|
extosc: ref {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-output-names = "ref";
|
|
clock-frequency = <40000000>;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
usb {
|
|
label = "d-link:blue:usb";
|
|
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
|
|
trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
|
|
linux,default-trigger = "usbport";
|
|
};
|
|
|
|
led_power_orange: power_orange {
|
|
label = "d-link:orange:power";
|
|
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
|
|
default-state = "on";
|
|
};
|
|
|
|
led_power_blue: power_blue {
|
|
label = "d-link:blue:power";
|
|
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wps {
|
|
label = "d-link:blue:wps";
|
|
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
planet_orange {
|
|
label = "d-link:orange:planet";
|
|
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
planet_blue {
|
|
label = "d-link:blue:planet";
|
|
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
ath9k-leds {
|
|
compatible = "gpio-leds";
|
|
|
|
wlan2g {
|
|
label = "d-link:blue:wlan2g";
|
|
gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy0tpt";
|
|
};
|
|
|
|
wlan5g {
|
|
label = "d-link:blue:wlan5g";
|
|
gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy1tpt";
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
linux,code = <KEY_RESTART>;
|
|
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wps {
|
|
label = "wps";
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
rtl8366s {
|
|
compatible = "realtek,rtl8366s";
|
|
gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
|
|
gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
|
|
realtek,initvals = <0x06 0x0108>;
|
|
|
|
mdio-bus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
phy-mask = <0x10>;
|
|
|
|
phy4: ethernet-phy@4 {
|
|
reg = <4>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&usb1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
usb_ohci_port: port@1 {
|
|
reg = <1>;
|
|
#trigger-source-cells = <0>;
|
|
};
|
|
};
|
|
|
|
&usb2 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
usb_ehci_port: port@1 {
|
|
reg = <1>;
|
|
#trigger-source-cells = <0>;
|
|
};
|
|
};
|
|
|
|
&usb_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
status = "okay";
|
|
|
|
ath9k0: wifi@0,11 {
|
|
compatible = "pci168c,0029";
|
|
reg = <0x8800 0 0 0 0>;
|
|
qca,no-eeprom;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
};
|
|
|
|
ath9k1: wifi@0,12 {
|
|
compatible = "pci168c,0029";
|
|
reg = <0x9000 0 0 0 0>;
|
|
qca,no-eeprom;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
};
|
|
};
|
|
|
|
&uart {
|
|
status = "okay";
|
|
};
|
|
|
|
&pll {
|
|
clocks = <&extosc>;
|
|
};
|
|
|
|
&spi {
|
|
status = "okay";
|
|
|
|
num-cs = <1>;
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <25000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x000000 0x040000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "config";
|
|
reg = <0x040000 0x010000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x050000 0x610000>;
|
|
};
|
|
|
|
caldata: partition@60000 {
|
|
label = "caldata";
|
|
reg = <0x660000 0x010000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@670000 {
|
|
label = "unknown";
|
|
reg = <0x670000 0x190000>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ð0 {
|
|
status = "okay";
|
|
|
|
pll-data = <0x11110000 0x00001099 0x00991099>;
|
|
|
|
fixed-link {
|
|
speed = <1000>;
|
|
full-duplex;
|
|
};
|
|
};
|
|
|
|
ð1 {
|
|
status = "okay";
|
|
|
|
pll-data = <0x11110000 0x00001099 0x00991099>;
|
|
|
|
phy-handle = <&phy4>;
|
|
};
|