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3020d9f8b4
Don't report speed in case link is down. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
47 lines
1.5 KiB
Diff
47 lines
1.5 KiB
Diff
From cbfed00575d15eafd85efd9619b7ecc0836a4aa7 Mon Sep 17 00:00:00 2001
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From: Alexander Couzens <lynxis@fe80.eu>
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Date: Sat, 13 Aug 2022 14:42:12 +0200
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Subject: [PATCH 04/10] net: mtk_sgmii: implement mtk_pcs_ops
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Implement mtk_pcs_ops for the SGMII pcs to read the current state
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of the hardware.
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Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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[added DUPLEX_FULL]
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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---
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drivers/net/ethernet/mediatek/mtk_sgmii.c | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
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+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
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@@ -122,10 +122,28 @@ static void mtk_pcs_link_up(struct phyli
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regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
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}
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+static void mtk_pcs_get_state(struct phylink_pcs *pcs, struct phylink_link_state *state)
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+{
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+ struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
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+ unsigned int val;
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+
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+ regmap_read(mpcs->regmap, SGMSYS_PCS_CONTROL_1, &val);
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+ state->an_complete = !!(val & SGMII_AN_COMPLETE);
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+ state->link = !!(val & SGMII_LINK_STATYS);
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+ if (!state->link)
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+ return;
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+
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+ regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
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+ state->speed = val & RG_PHY_SPEED_3_125G ? SPEED_2500 : SPEED_1000;
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+ state->duplex = DUPLEX_FULL;
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+ state->pause = 0;
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+}
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+
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static const struct phylink_pcs_ops mtk_pcs_ops = {
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.pcs_config = mtk_pcs_config,
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.pcs_an_restart = mtk_pcs_restart_an,
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.pcs_link_up = mtk_pcs_link_up,
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+ .pcs_get_state = mtk_pcs_get_state,
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};
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int mtk_sgmii_init(struct mtk_sgmii *ss, struct device_node *r, u32 ana_rgc3)
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