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e55b4b436e
Some BCM63268 bootloaders may leave gpio registers, related to the roboswitch, disabled before loading the OpenWrt firmware. As result of this the switch won't work. These registers, if not enabled, probably avoid forwarding packets. Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
106 lines
4.7 KiB
Diff
106 lines
4.7 KiB
Diff
From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Mon, 31 Jul 2017 20:10:36 +0200
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Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
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---
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arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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--- a/arch/mips/bcm63xx/clk.c
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+++ b/arch/mips/bcm63xx/clk.c
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@@ -517,6 +517,8 @@ static struct clk_lookup bcm3368_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -533,7 +535,9 @@ static struct clk_lookup bcm6318_clks[]
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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+ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -547,7 +551,10 @@ static struct clk_lookup bcm6328_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -560,6 +567,7 @@ static struct clk_lookup bcm6338_clks[]
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -574,6 +582,7 @@ static struct clk_lookup bcm6345_clks[]
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -588,6 +597,7 @@ static struct clk_lookup bcm6348_clks[]
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -604,6 +614,8 @@ static struct clk_lookup bcm6358_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -623,7 +635,10 @@ static struct clk_lookup bcm6362_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -639,6 +654,8 @@ static struct clk_lookup bcm6368_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -653,7 +670,10 @@ static struct clk_lookup bcm63268_clks[]
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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+ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
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+ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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