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SCM SDI disable support is pending upstream, so lets use that instead. Since the board check needs to be split out, export it with a header so it applies with git-am. Signed-off-by: Robert Marko <robimarko@gmail.com>
61 lines
1.8 KiB
Diff
61 lines
1.8 KiB
Diff
From b514bc3c0a5a57bc83843dc66c72788b9c9435ac Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Thu, 18 May 2023 16:02:23 +0200
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Subject: [PATCH 1/3] firmware: qcom: scm: Add SDI disable support
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Some SoC-s like IPQ5018 require SDI(Secure Debug Image) to be disabled
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before trying to reboot, otherwise board will just hang after reboot has
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been issued via PSCI.
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So, provide a call to SCM that allows disabling it.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Acked-by: Mukesh Ojha <quic_mojha@quicinc.com>
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---
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drivers/firmware/qcom_scm.c | 23 +++++++++++++++++++++++
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drivers/firmware/qcom_scm.h | 1 +
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2 files changed, 24 insertions(+)
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--- a/drivers/firmware/qcom_scm.c
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+++ b/drivers/firmware/qcom_scm.c
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@@ -389,6 +389,29 @@ int qcom_scm_set_remote_state(u32 state,
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}
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EXPORT_SYMBOL(qcom_scm_set_remote_state);
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+static int qcom_scm_disable_sdi(void)
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+{
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+ int ret;
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+ struct qcom_scm_desc desc = {
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+ .svc = QCOM_SCM_SVC_BOOT,
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+ .cmd = QCOM_SCM_BOOT_SDI_CONFIG,
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+ .args[0] = 1, /* Disable watchdog debug */
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+ .args[1] = 0, /* Disable SDI */
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+ .arginfo = QCOM_SCM_ARGS(2),
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+ .owner = ARM_SMCCC_OWNER_SIP,
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+ };
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+ struct qcom_scm_res res;
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+
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+ ret = qcom_scm_clk_enable();
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+ if (ret)
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+ return ret;
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+ ret = qcom_scm_call(__scm->dev, &desc, &res);
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+
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+ qcom_scm_clk_disable();
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+
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+ return ret ? : res.result[0];
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+}
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+
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static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
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{
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struct qcom_scm_desc desc = {
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--- a/drivers/firmware/qcom_scm.h
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+++ b/drivers/firmware/qcom_scm.h
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@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device
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#define QCOM_SCM_SVC_BOOT 0x01
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#define QCOM_SCM_BOOT_SET_ADDR 0x01
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#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
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+#define QCOM_SCM_BOOT_SDI_CONFIG 0x09
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#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
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#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a
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#define QCOM_SCM_FLUSH_FLAG_MASK 0x3
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